980 lines
20 KiB
C++
980 lines
20 KiB
C++
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#define DDC_IDEA_SIMULATOR
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#define AVB_1553_REAL_DEVICE
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#ifndef AVB_1553_REAL_DEVICE
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#include "TS_drv.h"
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#include "Int.h"
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#include "Mt.h"
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#include "BC.h"
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//#include <QThread>
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//#include <QDebug>
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//#include "time_metrics.h"
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#include <stdint.h>
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#ifndef WINVER
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#define WINVER 0x501
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#endif
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#include <windows.h>
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class SmallMimicDevice
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{
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public:
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struct ddc_mem_t
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{
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unsigned long long align;
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unsigned long tt_base;
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unsigned long intr_raised;
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unsigned long long spare[64];
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uint16_t ctrl[1024];
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unsigned long long spare2[64];
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uint16_t mem[8*1024];
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unsigned long long spare3[64];
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};
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HANDLE hSharedEvent;
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HANDLE hSharedMemory;
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void* shMemP;
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volatile ddc_mem_t* ddc_mem;
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volatile uint16_t* rtg_avb_sim_control__;
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volatile uint16_t* rtg_avb_sim_dpram__;
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unsigned int tgt_rt;
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enum { sh_mem_size=64*1024};
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SmallMimicDevice(bool create=false):
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hSharedEvent(0),
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hSharedMemory(0),
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ddc_mem(0),
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rtg_avb_sim_control__(0),
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rtg_avb_sim_dpram__(0)
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{
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instance=this;
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shMemP=0;
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hSharedMemory=::OpenFileMappingA(FILE_MAP_ALL_ACCESS, FALSE, "SmallMimic_DDC_SharedMemory");
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if (hSharedMemory==NULL || hSharedMemory==INVALID_HANDLE_VALUE)
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{
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if (create)
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{
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hSharedMemory=::CreateFileMappingA(INVALID_HANDLE_VALUE, NULL, PAGE_READWRITE, 0, sh_mem_size, "SmallMimic_DDC_SharedMemory");
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if (!hSharedMemory)
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{
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//qDebug()<<"SM: cannot create shared memory";
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hSharedMemory=0;
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}
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}
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}
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if (!hSharedMemory)
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{
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//qDebug()<<"SM-DDC Device: cannot open shared memory: Working stand-alone";
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}
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else
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{
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shMemP=::MapViewOfFile(hSharedMemory, FILE_MAP_ALL_ACCESS, 0, 0, sh_mem_size);
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if (!shMemP)
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{
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//qDebug()<<"SM-DDC Device: cannot map shared memory - Working stand-alone";
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CloseHandle(hSharedMemory);
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hSharedMemory=0;
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}
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else
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{
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hSharedEvent=::CreateEventA(0, FALSE, FALSE, "SmallMimic_DDC_Device_Event");
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if (!hSharedEvent || hSharedEvent==INVALID_HANDLE_VALUE)
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{
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//qDebug()<<"SM: cannot open shared event - Cannot generate pseudo-interrupt";
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CloseHandle(hSharedMemory);
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hSharedMemory=0;
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hSharedEvent=::CreateEvent(0, FALSE, FALSE, 0);
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}
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}
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}
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if (!shMemP)
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{
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shMemP=new char[sizeof(ddc_mem_t)];
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}
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ddc_mem=reinterpret_cast<volatile ddc_mem_t*>(shMemP);
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rtg_avb_sim_control__=&(ddc_mem->ctrl[0]);
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rtg_avb_sim_dpram__=&(ddc_mem->mem [0]);
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tgt_rt=0;
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//qDebug()<<"SM: DDC shared resources succesfully created";
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atexit(SmallMimicDevice::staticCleanUp);
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}
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uint16_t timetag()
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{
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static uint16_t tt;
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return tt++;
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}
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bool checkDdc(unsigned int rt)
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{
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if (!rtg_avb_sim_control__)
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return false;
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if (rt==0)
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return true;
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if (tgt_rt==0)
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tgt_rt=20;
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return rt==tgt_rt;
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}
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enum intr_type_t { intr_bc_eof=1<<3, intr_eom=1, intr_eom_sa=1<<4};
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void intrGenerate(unsigned int type)
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{
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ddc_mem->intr_raised|=type;
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SetEvent(hSharedEvent);
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}
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unsigned int intrGenAndClear()
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{
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unsigned int i=ddc_mem->intr_raised;
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ddc_mem->intr_raised=0;
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return i;
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}
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bool intrWait(unsigned int timeout=INFINITE)
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{
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DWORD res=::WaitForSingleObject(hSharedEvent, timeout);
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if (res==WAIT_OBJECT_0)
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return true;
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return false;
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}
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void writeModeData(unsigned int mc, uint16_t value)
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{
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if (mc==17)
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rtg_avb_sim_dpram__[0x110+1]=value;
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}
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void writeMessage(unsigned int rt, unsigned int subaddress, uint16_t* const data, unsigned int size)
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{
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if (!checkDdc(rt))
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return;
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uint16_t sp=rtg_avb_sim_dpram__[0x100];
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rtg_avb_sim_control__[0x3]=sp;
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if (sp>0x0FF)
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return;
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if (subaddress>31)
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return;
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rtg_avb_sim_dpram__[sp+3]=rt|(uint16_t(subaddress)<<5)|size;
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rtg_avb_sim_dpram__[sp+1]=timetag();
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rtg_avb_sim_dpram__[sp+0]=0x8000;
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rtg_avb_sim_dpram__[0x100]=uint16_t((sp+4) & 0x0FF);
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int gen_intr=0;
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if (subaddress==0)
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{
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if (size>=0x10)
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{
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int n=size-0x10;
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rtg_avb_sim_dpram__[0x110+n]=data[0];
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gen_intr=rtg_avb_sim_dpram__[0x109] & (1<<n);
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}
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}
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else
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{
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uint16_t bctrl=rtg_avb_sim_dpram__[0x1A0+subaddress];
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gen_intr=bctrl & 0x0200;
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unsigned int db_enable=bctrl & 0x8000;
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uint16_t buffer=rtg_avb_sim_dpram__[0x140+subaddress];
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rtg_avb_sim_dpram__[sp+2]=buffer;
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for(unsigned int i=0; i<size; ++i)
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rtg_avb_sim_dpram__[buffer+i]=data[i];
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if (db_enable)
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{
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uint16_t current=buffer & 0x20;
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if (current)
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buffer&=(~0x20);
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else
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buffer|=0x20;
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rtg_avb_sim_dpram__[0x140+subaddress]=buffer;
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}
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}
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rtg_avb_sim_dpram__[sp+1]=timetag();
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rtg_avb_sim_dpram__[sp+0]=0x4000;
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if (gen_intr)
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{
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SetEvent(hSharedEvent);
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}
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}
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static void staticCleanUp()
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{
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if (instance)
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delete instance;
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}
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~SmallMimicDevice()
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{
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if (hSharedMemory)
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CloseHandle(hSharedMemory);
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if (hSharedEvent)
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CloseHandle(hSharedEvent);
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}
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static SmallMimicDevice* instance;
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};
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SmallMimicDevice* SmallMimicDevice::instance;
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static Device_t fakeDevice;
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static DRV_CONFIG fakeConfig;
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static U16BIT bc_intr_mask=0xFFFF;
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static S32BIT (*bc_isr_handler)(Device_p, S16BIT, S16BIT);
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static S32BIT (*mon_isr_handler)(Device_p);
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struct sim_ddc_mon_stack_t {
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unsigned int pos;
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unsigned char buffer[16*1024];
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};
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static sim_ddc_mon_stack_t sim_ddc_mon_stack;
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typedef struct {
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unsigned int size;
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U16BIT data[32];
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} ddc_sim_data_table_t;
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#define SIM_DT_NUM 1024
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static ddc_sim_data_table_t ddc_sim_dt[SIM_DT_NUM];
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static S16BIT mc_data[32];
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struct sim_message_table_t {
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MESSAGE msg[1024];
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};
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typedef struct {
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bool simulated;
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bool busy;
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} sim_ddc_simulated_rt_t;
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//static bool sim_ddc_rt[32];
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static sim_ddc_simulated_rt_t sim_ddc_rt[32];
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static sim_message_table_t message_table;
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struct sim_frame_t {
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unsigned int m_time;
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bool bc_running;
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bool mon_running;
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bool skip_disabled;
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unsigned int len;
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U16BIT msg[1024];
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};
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static sim_frame_t sim_frame;
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static IDEA_INFO sim_info;
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//extern metricRegistered metricDdcDriverISR;
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//static metricRegistered mSimISR("DDC_SimIRS", 0, 0, &metricDdcDriverISR);
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static void DdcSimulatore_SimulateBcTick_(bool showDbg=false);
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void DdcSimulator_SimulateBcTick()
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{
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DdcSimulatore_SimulateBcTick_(true);
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}
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#include <Mmsystem.h>
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#ifdef USE_MM_TIMER
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#define TIMEOUT_VAR default_wait_time
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#else
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#define TIMEOUT_VAR minor_frame_time
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#define timeSetEvent(a_, b_, c_, d_, e_) (0)
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#define timeKillEvent(x_) ((void)(0))
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#endif
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class WorkerThread//: public QThread
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{
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public:
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WorkerThread(void (*cb)(void)):
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stopMe(false),
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//mmT(0),
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hEvent(0),
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callback(cb)
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{
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hEvent=CreateEvent(0, FALSE, FALSE, 0);
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hCtrlEvent=CreateEvent(0, TRUE, TRUE, 0);
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ResetEvent(hCtrlEvent);
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pauseMe=true;
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minor_frame_time=100;
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wait_time=&TIMEOUT_VAR;
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default_wait_time=INFINITE;
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//start(); //QThread::TimeCriticalPriority);
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}
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unsigned int minor_frame_time;
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unsigned int* wait_time;
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unsigned int default_wait_time;
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unsigned int fpos;
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void setTime(unsigned int ms)
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{
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minor_frame_time=ms;
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}
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void go()
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{
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stopMe=false;
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fpos=0;
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if (minor_frame_time<10)
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minor_frame_time=10;
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pauseMe=false;
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SetEvent(hCtrlEvent);
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mmT=timeSetEvent(minor_frame_time, 0, (LPTIMECALLBACK)hEvent, 0, TIME_PERIODIC|TIME_CALLBACK_EVENT_SET); //|TIME_KILL_SYNCHRONOUS);
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}
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virtual void kill()
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{
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stop();
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stopMe=true;
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pauseMe=true;
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CloseHandle(hCtrlEvent);
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if (hEvent)
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CloseHandle(hEvent);
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}
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virtual void stop()
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{
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if (mmT)
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timeKillEvent(mmT);
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pauseMe=true;
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ResetEvent(hCtrlEvent);
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}
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protected:
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volatile bool stopMe;
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volatile bool pauseMe;
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MMRESULT mmT;
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HANDLE hEvent;
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HANDLE hCtrlEvent;
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void (*callback)(void);
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virtual void run()
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{
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do
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{
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WaitForSingleObject(hCtrlEvent, 1000);
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for(; !pauseMe && !stopMe;)
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{
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DWORD res=WaitForSingleObject(hEvent, *wait_time); //INFINITE);
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if (res==WAIT_FAILED)
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break;
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if (res==WAIT_OBJECT_0 || res==WAIT_TIMEOUT)
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DdcSimulatore_SimulateBcTick_();
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}
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} while(!stopMe);
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}
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};
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static WorkerThread* wth;
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static unsigned int sim_ddc_generated_interrupts;
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void DdcSimulatore_SimulateBcTick_(bool showDbg)
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{
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static unsigned int fpos;
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if (!sim_frame.bc_running)
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return;
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//metricMeasure xx(mSimISR);
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for(;fpos<sim_frame.len; ++fpos)
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{
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int i=sim_frame.msg[fpos];
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//if (showDbg) qDebug()<<"SIM: "<<fpos<<" -> "<<i;
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if (i==IDEA_END_OF_MINOR)
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{
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//if (showDbg) qDebug()<<"SIM: END OF MINOR";
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++fpos;
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break;
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}
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if (i==IDEA_END_OF_MAJOR)
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{
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fpos=0;
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//if (showDbg) qDebug()<<"SIM: END OF MAJOR";
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break;
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}
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MESSAGE& m=message_table.msg[i];
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unsigned int rt=m.cmd_1.tadr;
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if (SmallMimicDevice::instance)
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{
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if (m.comm_type==RECEIVE)
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{
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//SmallMimicDevice::instance->writeMessage(rt, m.cmd_1.subadr, ddc_sim_dt[m.data_table_no].data, m.cmd_1.wcnt);
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}
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else if (m.comm_type==MODE)
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{
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if (m.cmd_1.wcnt==17)
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{
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SmallMimicDevice::instance->writeModeData(11, mc_data[m.cmd_1.wcnt]);
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SmallMimicDevice::instance->intrGenerate(SmallMimicDevice::intr_eom|SmallMimicDevice::intr_eom_sa);
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}
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}
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}
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if (m.first_intermessage_routine==IDEA_IMR_INT_ON_END_OF_MESSAGE || m.second_intermessage_routine==IDEA_IMR_INT_ON_END_OF_MESSAGE)
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{
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if (bc_isr_handler && (bc_intr_mask & ((1<<4)|(1<<5)|(1<<6)))==0)
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{
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S16BIT itype=sim_ddc_rt[rt].simulated ? 0x80 : 0x81;
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S16BIT param=0;
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itype=itype|(i<<8);
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bc_isr_handler(0, itype, param);
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++sim_ddc_generated_interrupts;
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}
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}
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if (sim_frame.mon_running)
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{
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if (m.comm_type!=IDEA_NOP)
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{
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U16BIT header[8+32];
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memset(header, 0, sizeof header);
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if (m.comm_type==TRANSMIT)
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{
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void* px=&(m.cmd_1);
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short* spx=(short*)px;
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header[2]=*spx;
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header[1]=*spx;
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header[0]=2<<6;
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}
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else
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{
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void* px=&(m.cmd_1);
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short* spx=(short*)px;
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header[1]=*spx;
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header[2]=*spx;
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header[0]=1<<6;
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}
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U32BIT tt_val;
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ddcRead_mon_rtc(0, &tt_val);
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header[5]=(tt_val>>16) & 0x0FFFF;
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header[6]=tt_val & 0x0FFFF;
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unsigned int x_wc=0;
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if (m.comm_type==MODE)
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{
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if (m.cmd_1.wcnt==17)
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{
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x_wc=1;
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header[8]=mc_data[17];
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}
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}
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else //if (m.comm_type==RECEIVE)
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{
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x_wc=m.cmd_1.wcnt==0 ? 32 : m.cmd_1.wcnt;
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if (x_wc>32)
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x_wc=0;
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for(unsigned int i=0; i<x_wc; ++i)
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header[8+i]=ddc_sim_dt[m.data_table_no].data[i];
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}
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unsigned short sts_w=m.cmd_1.subadr<<12;
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if (sim_ddc_rt[rt].simulated)
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{
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if (sim_ddc_rt[rt].busy)
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sts_w|=(1<<4);
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header[7]=0;
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header[3]=sts_w;
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header[4]=sts_w;
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if (m.comm_type==TRANSMIT)
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x_wc=m.cmd_1.wcnt==0 ? 32 : m.cmd_1.wcnt;
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}
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else
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header[7]=2;
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if (x_wc>32)
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x_wc=0;
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header[0]|=x_wc<<8;
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{
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unsigned int p=sim_ddc_mon_stack.pos;
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if ((p+(sizeof header))<(sizeof sim_ddc_mon_stack.buffer))
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{
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unsigned int s=(x_wc+8)*2;
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memcpy(&sim_ddc_mon_stack.buffer[p], header, s);
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if (sim_ddc_mon_stack.pos==p) //A simple concurrent test that can lost message
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{
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p+=s;
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sim_ddc_mon_stack.pos=p;
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}
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}
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}
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}
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}
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if (i==IDEA_END_OF_MINOR)
|
|
{
|
|
++fpos;
|
|
break;
|
|
}
|
|
if (i==IDEA_END_OF_MAJOR)
|
|
{
|
|
fpos=0;
|
|
break;
|
|
}
|
|
|
|
if ((!sim_frame.skip_disabled) && (m.first_intermessage_routine==IDEA_IMR_SKIP_NEXT || m.second_intermessage_routine==IDEA_IMR_SKIP_NEXT))
|
|
{
|
|
++fpos;
|
|
continue;
|
|
}
|
|
|
|
}
|
|
}
|
|
|
|
IDEA_INFO ddcGetIdeaInfo(Device_p /*pCrd*/)
|
|
{
|
|
return sim_info;
|
|
}
|
|
|
|
Error_t __DECL ddcResetCard(Device_p *pCrd, DRV_CONFIG *config, U16BIT /*LogNum*/)
|
|
{
|
|
if (!SmallMimicDevice::instance)
|
|
{
|
|
SmallMimicDevice::instance=new SmallMimicDevice;
|
|
}
|
|
|
|
*pCrd=&fakeDevice;
|
|
if (config)
|
|
*config=fakeConfig;
|
|
if (!wth)
|
|
wth=new WorkerThread(0);
|
|
|
|
return 0;
|
|
}
|
|
|
|
Error_t IdeaResetCard(ViInt16 /*CardNo*/, ViInt16 /*Mode*/)
|
|
{
|
|
return 0;
|
|
}
|
|
|
|
Error_t __DECL ddcHaltIdea(Device_p /*pCrd*/)
|
|
{
|
|
return 0;
|
|
}
|
|
|
|
Error_t IdeaShutdown(ViInt16 /*CardNo*/)
|
|
{
|
|
return 0;
|
|
}
|
|
|
|
Error_t __DECL ddcShutDownIdea(Device_p *pCrd)
|
|
{
|
|
wth->kill();
|
|
|
|
*pCrd=0;
|
|
return 0;
|
|
}
|
|
|
|
Error_t __DECL ddcIdeaCoreVersion(Device_p /*pCrd*/, char *rtl_core_ver)
|
|
{
|
|
strcpy(rtl_core_ver, "GC-DDC-SIM-CORE-1.0");
|
|
return 0;
|
|
}
|
|
|
|
Error_t __DECL ddcCardState(Device_p /*pCrd*/, CARD_STATE *state)
|
|
{
|
|
memset(state, 0, sizeof *state);
|
|
state->bcrt=sim_frame.bc_running ? RUNNING: HALTED;
|
|
state->mon=sim_frame.mon_running ? RUNNING : HALTED;
|
|
if (sim_frame.bc_running && sim_frame.mon_running)
|
|
state->card=RUN_BCRT_MONITOR_STATE;
|
|
else if (sim_frame.bc_running)
|
|
state->card=RUN_BCRT_STATE;
|
|
else if (sim_frame.mon_running)
|
|
state->card=RUN_MONITOR_STATE;
|
|
else
|
|
state->card=HALT_STATE;
|
|
|
|
return 0;
|
|
}
|
|
|
|
Error_t __DECL ddcIdeaVersion(Device_p /*pCrd*/,char *rtl_ver,char *driver_ver,char *part_no)
|
|
{
|
|
if (rtl_ver)
|
|
strcpy(rtl_ver, "GA-DCC-Sim-RTL-1.0");
|
|
if (driver_ver)
|
|
strcpy(driver_ver, "GA-DCC-Sim-RTL-1.0");
|
|
if (part_no)
|
|
strcpy(part_no, "GA-DCC-Sim-RTL-1.0");
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
Error_t ddcDef_int_mask(Device_p, U16BIT mask)
|
|
{
|
|
bc_intr_mask=mask;
|
|
return 0;
|
|
}
|
|
|
|
Error_t ddcDef_int_mask_monitor(Device_p /*pCrd*/, U16BIT maskreg)
|
|
{
|
|
maskreg=maskreg & 0xF000;
|
|
bc_intr_mask=bc_intr_mask & 0x0FFF;
|
|
bc_intr_mask|=maskreg;
|
|
return 0;
|
|
}
|
|
|
|
Error_t ddcDef_int_mask_bcrt(Device_p /*pCrd*/, U16BIT maskreg)
|
|
{
|
|
maskreg=maskreg & 0x0FFF;
|
|
bc_intr_mask=bc_intr_mask & 0xF000;
|
|
bc_intr_mask|=maskreg;
|
|
return 0;
|
|
}
|
|
|
|
Error_t ddcSelect_bus(Device_p /*pCrd*/, U16BIT /*bus_a_state*/, U16BIT /*bus_b_state*/)
|
|
{
|
|
return 0;
|
|
}
|
|
|
|
Error_t ddcRead_mon_rtc(Device_p, U32BIT* tt_val)
|
|
{
|
|
DWORD tt=GetTickCount();
|
|
|
|
*tt_val=tt*1000;
|
|
return 0;
|
|
}
|
|
|
|
Error_t ddcDef_monitor_stack(Device_p /*pCrd*/, U16BIT /*type*/)
|
|
{
|
|
return 0;
|
|
}
|
|
|
|
Error_t ddcDef_minor_frame_time(Device_p /*pCrd*/, S32BIT val)
|
|
{
|
|
sim_frame.m_time=val;
|
|
wth->setTime(val/1000);
|
|
return 0;
|
|
}
|
|
|
|
Error_t ddcDef_table_size(Device_p /*pCrd*/, S16BIT id, S16BIT size)
|
|
{
|
|
if (id<0 || id>=SIM_DT_NUM)
|
|
return 1;
|
|
ddc_sim_dt[id].size=size;
|
|
return 0;
|
|
}
|
|
|
|
Error_t ddcDef_rt_map(Device_p /*pCrd*/, S16BIT /*tadr*/, S16BIT /*tr_bit*/, S16BIT /*sadr*/, S16BIT /*table_id*/)
|
|
{
|
|
return 0;
|
|
}
|
|
|
|
|
|
Error_t ddcSetBCRTEvent(Device_p /*pCrd*/, S32BIT (*usr_handler)(Device_p, S16BIT, S16BIT))
|
|
{
|
|
bc_isr_handler=usr_handler;
|
|
return 0;
|
|
}
|
|
|
|
Error_t ddcSetMONEvent(Device_p /*pCrd*/, S32BIT (*usr_handler)(Device_p))
|
|
{
|
|
mon_isr_handler=usr_handler;
|
|
return 0;
|
|
}
|
|
|
|
Error_t ddcHalt_bcrt(Device_p /*pCrd*/)
|
|
{
|
|
sim_frame.bc_running=false;
|
|
//if (!sim_frame.mon_running)
|
|
wth->stop();
|
|
return 0;
|
|
}
|
|
|
|
Error_t ddcHalt_mon(Device_p /*pCrd*/)
|
|
{
|
|
sim_frame.mon_running=false;
|
|
//if (!sim_frame.bc_running)
|
|
// wth->stop();
|
|
return 0;
|
|
}
|
|
|
|
Error_t ddcRun_bc(Device_p /*pCrd*/, S16BIT /*position*/, S32BIT /*times*/)
|
|
{
|
|
sim_frame.bc_running=true;
|
|
//if (!sim_frame.mon_running)
|
|
wth->go();
|
|
return 0;
|
|
}
|
|
|
|
Error_t ddcRun_mon(Device_p /*pCrd*/)
|
|
{
|
|
sim_frame.mon_running=true;
|
|
//if (!sim_frame.bc_running)
|
|
// wth->go();
|
|
return 0;
|
|
}
|
|
|
|
Error_t ddcDef_message(Device_p /*pCrd*/, S16BIT id, tagMESSAGE *message)
|
|
{
|
|
if (id<1 || id>=1024)
|
|
return 1;
|
|
message_table.msg[id]=*message;
|
|
return 0;
|
|
}
|
|
|
|
Error_t ddcDef_frame(Device_p /*pCrd*/, S16BIT length, U16BIT *frame)
|
|
{
|
|
for(int i=0; i<length; ++i)
|
|
sim_frame.msg[i]=frame[i];
|
|
sim_frame.len=length;
|
|
return 0;
|
|
}
|
|
|
|
Error_t ddcSkip_next_message(Device_p /*pCrd*/, S16BIT yes_no)
|
|
{
|
|
sim_frame.skip_disabled=yes_no;
|
|
return 0;
|
|
}
|
|
|
|
Error_t IdeaDbgOSGetCounts(ViInt16 /*pCrd*/, ViPInt32 tot, ViPInt32 mon_host, ViPInt32 mon_card, ViPInt32 bc_host, ViPInt32 bc_card)
|
|
{
|
|
*mon_host=0;
|
|
*mon_card=0;
|
|
*tot=sim_ddc_generated_interrupts;
|
|
*bc_card=sim_ddc_generated_interrupts;
|
|
*bc_host=sim_ddc_generated_interrupts;
|
|
return 0;
|
|
}
|
|
|
|
Error_t ddcRead_mon_stack_part(Device_p /*pCrd*/, S16BIT *buf, S16BIT *count, S16BIT *messages)
|
|
{
|
|
//*count=0;
|
|
//*messages=0;
|
|
unsigned int s=sim_ddc_mon_stack.pos;
|
|
//if (s> (unsigned int)((*messages)*40))
|
|
// s= (*messages)*40;
|
|
memcpy(buf, sim_ddc_mon_stack.buffer, s);
|
|
*messages=s/(sizeof(U16BIT)*40);
|
|
*count=s/2;
|
|
sim_ddc_mon_stack.pos=0;
|
|
return 0;
|
|
}
|
|
|
|
Error_t ddcRead_time_tags(Device_p /*pCrd*/, void * /*buf*/, S16BIT *count)
|
|
{
|
|
*count=0;
|
|
return 0;
|
|
}
|
|
|
|
Error_t ddcWrite_mode_data(Device_p /*pCrd*/, S16BIT /*tadr*/, S16BIT mode_code, S16BIT val)
|
|
{
|
|
mc_data[mode_code]=val;
|
|
return 0;
|
|
}
|
|
|
|
Error_t ddcDef_rt(Device_p /*pCrd*/, S16BIT tadr, _tagRT_DEFS * /*rt*/)
|
|
{
|
|
sim_ddc_rt[tadr].simulated=true;
|
|
return 0;
|
|
}
|
|
|
|
Error_t ddcSet_busy(Device_p /*pCrd*/, S16BIT tadr, S16BIT /*immediate*/)
|
|
{
|
|
sim_ddc_rt[tadr].busy=true;
|
|
return 0;
|
|
}
|
|
|
|
Error_t ddcDef_emulate_rt(Device_p /*pCrd*/, S16BIT /*tadr*/, S16BIT /*emulate*/)
|
|
{
|
|
return 0;
|
|
}
|
|
|
|
Error_t ddcDecode_mon_message(Device_p /*pCrd*/, U16BIT *buf, MON_MSG *msg)
|
|
{
|
|
static volatile int invalid_msg;
|
|
|
|
memset(msg, 0, sizeof *msg);
|
|
msg->broadcast=0;
|
|
unsigned int cmode=(buf[0]>>6) & 0x3;
|
|
unsigned int c1=1;
|
|
unsigned int c2=2;
|
|
if (cmode==2)
|
|
{
|
|
c1=2;
|
|
c2=1;
|
|
|
|
}
|
|
msg->comm_type= cmode==2 ? TRANSMIT : cmode==0 ? MODE : RECEIVE;
|
|
|
|
msg->cmd_1=buf[c1];
|
|
msg->cmd_2=buf[c2];
|
|
msg->s_cmd_1=*(struct com*)&buf[c1];
|
|
msg->s_cmd_2=*(struct com*)&buf[c2];
|
|
|
|
msg->cmd_1_flag=c1==1 ? 1: 0;
|
|
msg->cmd_2_flag=c1==1 ? 0 : 1;
|
|
|
|
msg->tx_status=buf[3];
|
|
msg->rx_status=buf[4];
|
|
|
|
msg->word_count=(buf[0]>>8) & 0x3F;
|
|
msg->data_buf=(S16BIT*)(buf+8);
|
|
msg->next_msg=(S16BIT*)(buf+8+ msg->word_count);
|
|
|
|
msg->rtc=(buf[5]<<16) | buf[6];
|
|
|
|
unsigned int ec=(buf[7]>>1) & 0xF;
|
|
if (ec==0)
|
|
{
|
|
if (cmode==2)
|
|
{
|
|
msg->stat_r_flag=0;
|
|
msg->stat_t_flag=1;
|
|
}
|
|
else
|
|
{
|
|
msg->stat_r_flag=1;
|
|
msg->stat_t_flag=0;
|
|
}
|
|
//msg->rx_status=buf[c1];
|
|
//msg->tx_status=buf[c2];
|
|
msg->error=NO;
|
|
msg->error_inf.type=0;
|
|
}
|
|
else
|
|
{
|
|
msg->error=YES;
|
|
msg->error_inf.type=TYPE_NO_RESPONSE;
|
|
msg->stat_r_flag=0;
|
|
msg->stat_t_flag=0;
|
|
}
|
|
|
|
if (msg->s_cmd_1.tadr==0)
|
|
++invalid_msg;
|
|
|
|
return 0;
|
|
}
|
|
|
|
Error_t ddcGetErrorMessage(Device_p /*pCrd*/, S32BIT /*error_number*/, char *error_string)
|
|
{
|
|
strcpy(error_string, "unknown");
|
|
return 0;
|
|
}
|
|
|
|
|
|
Error_t ddcWrite_data(Device_p /*pCrd*/, S16BIT id, S16BIT *buf, S16BIT count, S16BIT pos)
|
|
{
|
|
if (id<1 || id>250)
|
|
return 1;
|
|
S16BIT n=(count+pos)-1;
|
|
if (n<0 || n>32)
|
|
return 2;
|
|
if (pos<1 || pos>32)
|
|
return 3;
|
|
|
|
memcpy(&(ddc_sim_dt[id].data[pos-1]), buf, 2*((count-pos)+1));
|
|
|
|
return 0;
|
|
}
|
|
|
|
Error_t ddcRead_data(Device_p /*pCrd*/, S16BIT id, S16BIT *buf, S16BIT count)
|
|
{
|
|
/*
|
|
static U16BIT sim_counter;
|
|
|
|
if (id<1 || id>250)
|
|
return 1;
|
|
if (count<1 || count>32)
|
|
return 2;
|
|
for(int i=0; i<32; ++i)
|
|
ddc_sim_dt[id].data[i]= ++sim_counter;
|
|
*/
|
|
memcpy(buf, ddc_sim_dt[id].data, count*2);
|
|
return 0;
|
|
}
|
|
|
|
Error_t ddcRead_message(Device_p /*pCrd*/, S16BIT /*id*/, tagMESSAGE *message)
|
|
{
|
|
message->det_error=NO_ERROR;
|
|
return 0;
|
|
}
|
|
|
|
bool DdcSimulator_isSimulator()
|
|
{
|
|
return true;
|
|
}
|
|
|
|
#else
|
|
|
|
bool DdcSimulator_isSimulator()
|
|
{
|
|
return false;
|
|
}
|
|
|
|
void DdcSimulator_SimulateBcTick()
|
|
{
|
|
}
|
|
|
|
#endif
|
|
|