193 lines
6.7 KiB
C
193 lines
6.7 KiB
C
/************************************************************************
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* *
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* BU-65558 SIMULATOR/TESTER *
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* *
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* FILE: defines.h *
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* PURPOSE: Predefined constants *
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* *
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* Revision history: *
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* created: 8/20/97 Adam Molny *
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* 9/04/2001 Updated Linux support *
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************************************************************************/
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#ifndef DEFINES_H
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#define DEFINES_H
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/* Inserted */
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#define INIT_STATE 0
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#define HALT_STATE 1
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#define HALTED 2
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#define RUNNING 3
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#define RUN_BCRT_STATE 4
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#define RUN_MONITOR_STATE 5
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#define RUN_BCRT_MONITOR_STATE 6
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#define UNDEFINED_STATE 7
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#define BCRT_MON_HW 1
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#define BCRT_HW 2 /* no monitor in hardware */
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#define MARK2_HW 3
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#define VME_HW 4
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#define IDEA_MIL_HW 5
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#define MARK3_HW 6
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#define MON_SW 0x00
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#define FAST_MON_SW 0x10
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#define PARAM_MON_SW 0x20
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#define VALID_MON_SW 0x30
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#define IDEA_1553B 0x100
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#define IDEA_1553A 0x101
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#define DRIVER_1553B 0x102
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#define DRIVER_1553A 0x103
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#define RECONSTR_BC 0x104
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#define RECONSTR_RT 0x105
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#define DEMO 0xFF
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#define IRIG_LOWWORD_TABLE_SIZE 0x2CDA
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#define GLUELOGIC_6 6
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/* Predefined Constants */
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#define NUM_MESSAGES 1024
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/* GENERAL PARAMETERS */
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#define BCRT 0
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#define MON 1
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#define NO 0
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#define YES 1
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#define SINGLE 0
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#define DOUBLE 1
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#define NILL 0
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#define BUS_A 0
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#define BUS_B 1
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#define RECEIVE 0
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#define TRANSMIT 1
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#define MODE 2
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#define RT_RT 3
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#define IDLE 5
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#define NOP 4
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#define LEGAL 1
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#define ILLEGAL 0
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#define DEFAULT_RESP_TIMEOUT 16
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/* BC/RT ERROR INJECTION CONSTANTS */
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#define E_NONE 0
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#define LENGTH_BIT 0x0300
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#define LENGTH_BIT_STATUS (0x0100 | 0 )
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#define LENGTH_BIT_DATA (0x0200 | 0 )
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#define LENGTH_WORD (0x0400 | 64)
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#define ENCODE_STATUS_GLITCH (0x0500 | 0 )
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#define ENCODE_STATUS_INVERSE (0x0700 | 0 )
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#define ENCODE_WORD_GLITCH (0x0900 | 0 )
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#define ENCODE_WORD_INVERSE (0x0C00 | 0 )
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#define ALTERNATE_STATUS (0x0F00 | 0 )
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#define GAP_ERROR (0x1000 | 0 )
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#define NO_RESPONSE_A (0x1200 | 0 )
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#define NO_RESPONSE_B (0x1300 | 0 )
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#define NO_RESPONSE_BOTH (0x1400 | 0 )
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#define LATE_RESPONSE (0x1500 | 1 )
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#define ALTER_BUS_RESPONSE (0x1600 | 128)
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/* FRAME CONSTANTS */
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#define BC_PAUSE 251
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#define SKIP 252
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#define BREAK_POINT 253
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#define END_OF_MAJOR 254
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#define END_OF_MINOR 255
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#define FOREVER -1l /* Ignore the VXWorks compiler warning here. */
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/* DETECTED ERRORS (read message) */
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#undef NO_ERROR
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#define NO_ERROR 0
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#define INVERSE_SYNC 2
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#define INVALID_DATA 4
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#define GAP 8
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#define NO_RESPONSE 16
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#define INVALID_STATUS 32
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#define BIT_LIT_IN_STATUS 64
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#define WRONG_TADR_IN_STATUS 128
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/* Intermessage routine indices */
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#define NO_OPERATION 1
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#define RTRY_ONCE_ALT_BUS 2
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#define RTRY_REMAIN_ALT_BUS 3
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#define RTRY_SAME_BUS 4
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#define INT_ON_END_OF_MESSAGE 5
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#define INT_FRAME_SYMBOL 6
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#define SET_SERQ_BIT 7
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#define RESET_SERQ_BIT 8
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#define RT_INT_AFTER_DATA 9
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#define RT_INT_AFTER_MODE 10
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#define RT_INT_CMD_MATCH 11
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#define RT_INT_MODE_MATCH 12
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#define TIME_TAG 13
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#define RESERVE_14 14 /* 29.06.94 */
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#define RTRY_TWICE 15
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#define SET_STATUS_BIT 16
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#define RESET_STATUS_BIT 17
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#define SET_TRIGGER 18
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#define RESET_TRIGGER 19
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#define WAIT_TRIGGER 20
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#define RESERVE_21 21 /* 29.06.94 */
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#define DISABLE_RT 22
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#define SET_BUSY 23
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#define RESET_BUSY 24
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#define SET_BUSY_RESET_SRQ 25 /* 29.06.94 */
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#define SET_SRQ_RESET_BUSY 26 /* 29.06.94 */
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#define RESERVE_27 27 /* 29.06.94 */
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#define RESERVE_28 28 /* 29.06.94 */
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#define RESERVE_29 29 /* 29.06.94 */
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#define RESERVE_30 30 /* 29.04.94 */
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#define SKIP_NEXT 31
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#define SET_DISCRETE_0 32
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#define SET_DISCRETE_1 33
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#define SET_DISCRETE_2 34
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#define SET_DISCRETE_3 35
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#define RESET_DISCRETE_0 36
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#define RESET_DISCRETE_1 37
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#define RESET_DISCRETE_2 38
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#define RESET_DISCRETE_3 39
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#define RESERVE_40 40 /* 29.06.94 */
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#define RESERVE_41 41 /* 29.06.94 */
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#define RESERVE_42 42 /* 29.06.94 */
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#define RESERVE_43 43 /* 29.06.94 */
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#define SKIP_NEXT_ONCE 44 /* 29.06.94 */
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#define RESERVE_45 45 /* 29.06.94 */
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#define RESERVE_46 46 /* 29.06.94 */
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#define BLOCK_DATA_BC 47 /* 29.08.95 */
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#define BLOCK_DATA_RT 48 /* 29.08.95 */
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#define RESERVE_49 49 /* 29.08.95 */
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#define RESERVE_50 50 /* 29.08.95 */
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#define SKIP_NEXT_ONCE_EX 51
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#define BC_IMR 0x100
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/* This comment is for internal use. Whenever, a new IMR
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is added, MAX_IMR_INDEX must be updated */
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#define MAX_IMR_INDEX 50
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/* MONITOR STACK */
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#define CYCLIC_STACK 1
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#define NON_CYCLIC_STACK 0
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/* MONITOR CAPTURE */
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#define CAPTURE_IMMEDIATE 0
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#define CAPTURE_COMMAND_TEMPLATE 1
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#define CAPTURE_EXCEPTION 2
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#define CAPTURE_TRIGGER 3
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#define ANY_EXCEPTION 0
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#define INVALID_COMMAND_EXCEPTION 1
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#define INVALID_DATA_EXCEPTION 2
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#define INVALID_STATUS_EXCEPTION 3
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#define GAP_PREC_DATA_EXCEPTION 4
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#define RESPONSE_TIME_EXCEPTION 5
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#define WRONG_RT_ADDR_EXCEPTION 6
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#define FLAGGED_STATUS_BIT_EXCEPTION 7
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#define ILLEGAL_COMMAND_EXCEPTION 8
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/* BUS COUPLING */
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#define COUPLING_DIRECT 0
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#define COUPLING_TRANSFORMER 1
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#define TERMINATION_NONE 0
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#define TERMINATION_HALF 1
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#define TERMINATION_FULL 2
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#endif /* #ifndef COMMON_H */
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