#ifndef FPGAFLASHPROFILE_H
#define FPGAFLASHPROFILE_H

#include <qstring.h>

enum step_t
{
    s_init=0,
    s_reset,
    s_status,
    s_read_id,
    s_erase,
    s_write,
    s_end,
    s_error,
    s_question,
    s_warning,
    s_read
};

enum spisr_bit_t
{
    rx_fifo_valid = 0x1,            //bit 0, This bit flags that data present into SPIRR is valid
    rx_fifo_overrun = 0x2,      //bit 1, This bit flags that an overrun error occurred during data reception into the RX FIFO.
    tx_fifo_almost_full = 0x10, //bit 4, This bit flags that an almost full condition occurred loading the TX FIFO. In particular this condition is activated when the number of bytes into the FIFO differs from respect the FIFO size.
    tx_fifo_overrun = 0x20,      //bit 5, This bit flags that an overrun error occurred loading data into the TX FIFO.
    tx_fifo_underrun = 0x40,     //bit 6, This bit flags that an underrun error occurred into the TX FIFO during data transmission.
    spi_core_error = 0x400,      //bit 10, The SPI Core error flags an error condition during transaction. This condition can be activated: - when an overrun or underrun is detected (on both "TX FIFO" or "RX FIFO") - when the required command is not implemented
    spi_core_ack = 0x800,        //bit 11, This bit is activated when a previously required transaction required with the "SPI request" on the SPICR register has been accepted
    spi_core_busy = 0x1000        //bit 12, This bit is activated when the core is executing the current transaction after that it has been run with the "SPI start" bit on the SPICR register.
};

//bytes address for different flash type
enum reg_moder_byteaddress_t
{
    bytes3address       =0,         //3 bytes address
    bytes4address       =1          //4 bytes address
};

//QSPI port
enum reg_moder_qspiport_t
{
    primarySpiPort      =0,         //use primary SPI interface port
    secondarySpiPort    =1          //use secondary SPI interface port
};


//Profilo contentente i dati della FPGA da utilizzare
class FpgaFlashProfile
{
public:
    unsigned long SectorSize_KBytes;
    unsigned long BaseAddress;
    unsigned long BaseOffset;

    reg_moder_qspiport_t spiport;
    reg_moder_byteaddress_t byteddress;
    unsigned long user_address_start_area;          //user, hex address, start fimware area
    unsigned long user_address_stop_area;           //user, hex address, stop fimware area
    unsigned long golden_address_start_area;        //golden, hex address, start fimware area
    unsigned long golden_address_stop_area;         //golden, hex address, stop fimware area

    QString ip;
    QString port;
    QString slotAddress;

    QString FileToSend;                           //complete path of file to send
    QString FileToSend2;                          //complete path of second file to send

    bool write2Flash;                             //0 only one flash, 1 for all flash

    //int dimMbit;                                  //128Mbit for xcku040
                                                  //256Mbit for xcku060, xc7a200
    bool writeRamp;                               //instead file, write ramp into flash

    bool verifySector;                            //verify single sector

    bool verifyFinal;                             //verify final write

    QString fName;                                //id of target

    bool isFpgaRFIF;                             //is rfif fpga?

    void reset()
    {
        SectorSize_KBytes           = 0;
        BaseAddress                 = 0;
        BaseOffset                  = 0;
        spiport                     = primarySpiPort;
        byteddress                  = bytes3address;
        user_address_start_area     = 0;
        user_address_stop_area      = 0;
        golden_address_start_area   = 0;
        golden_address_stop_area    = 0;
        ip                          = QString("");
        port                        = QString("");
        slotAddress                 = QString("");
        FileToSend                  = QString("");
        //dimMbit                   = 0;
        writeRamp                   = false;
        verifyFinal                 = false;
        verifySector                = false;
        fName                       = QString("");

        FileToSend2                  = QString("");
        write2Flash                 = false;
        isFpgaRFIF                  = false;
    }
};

#endif // FPGAFLASHPROFILE_H
