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SXXXXXXX_PyDownloadFwViaSRIO/_OLD/Vecchia_app/FpgaBeamMeUp/fpgarfifflashoperation.cpp
VALLONGOL fedaa4d41b primo commit
2026-01-22 17:10:05 +01:00

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#include "fpgarfifflashoperation.h"
#include <qstring.h>
#include "grifo_fw_map.h"
#include "grifo_fw_aesa_blob.h"
#include "grifo_aesa_fw_if.h"
#include <bsp_srio_mini_driver.h>
//***********************
//IMPORTANTE - configurazione dei messaggi per i test
//#define WRITE_FILE_BIN //de-commenta questa linea se vuoi salvare i file binari dei messaggi spediti
#define MAX_LOG //de-commenta per aumentare il log sul programma
//***********************
// Test erase: send command to erase a 64kbyte sector at an unused address
// #define RFIF_TEST_ERASE_ADDRESS 0x01F00000
// #define RFIF_TEST_ERASE_SIZE 0xFFFF
#define RFIF_TEST_ERASE_ADDRESS 0x01F00000
#define RFIF_TEST_ERASE_SIZE 0xFFFF
#define RFIF_TEST_READ_ADDRESS 0x01F00000
#define RFIF_TEST_READ_SIZE 0x100
#define RFIF_TEST_WRITE_ADDRESS 0x01F00000
#define RFIF_TEST_WRITE_SIZE 0x100
//RFIF FPGA address and SIZE
#define RFIF_GOLDEN_ADDRESS 0x00000000
#define RFIF_UPDATE_ADDRESS 0x00400000
#define RFIF_GOLDEN_UPDATE_SIZE 4*1024*1024 //4Mbyte
#define RFIF_ERASE_SINGLE_BLOCK_SIZE 0xFFFF
#include <fstream>
#include <string.h>
#define FILE_NAME_MESSAGE "message.bin"
#define FILE_NAME_PRE "message_sent_"
#define FILE_NAME_POST ".bin"
#define RFIF_READ_FW_STATUS_CMD_STR "RFIF - read firmware status"
#define RFIF_READ_STATUS_CMD_STR "RFIF - read status"
#define RFIF_READ_BIT_STATUS_CMD_STR "RFIF - read bit status"
#define RFIF_CFGMEM_READ_DATA_STR "RFIF - read cfgmem data"
#define RFIF_CFGMEM_ERASE_DATA_STR "RFIF - erase cfgmem data"
#define RFIF_CFGMEM_WRITE_DATA_STR "RFIF - write cfgmem data"
#define RFIF_ETI_READ_BACK_CMD_STR "RFIF - read ETI"
#define CTI_READ_STATUS_CMD_STR "CTI - read status"
#define AESA_READ_STATUS_CMD_STR "AESA - read status"
#define AESA_READ_FIRMWARE_STATUS_CMD_STR "AESA - read firmware status"
static uint8_t *reply;
static aesa::rfif_status_t *last_rfif_status;
static aesa::rfif_fw_status_t *last_rfif_fw_status;
static aesa::rfif_bit_status_t *last_rfif_bit_status;
static bool last_rfif_status_ok = 0;
static AesaStatusResponse aesaStatus;
static grifo_fw::aesa_receive_info_t aesa_rx_info[NUM_MAX_RESPONSES];
static bool lastRFIFBusy;
static bool lastRFIFTimeOutError;
struct resp_data_t
{
uint8_t resp_buffer[RFIF_TEST_READ_SIZE]; //buffer di risposta al comando di CFGMemeRead
bool isResponseOk; //true se il buffer di risposta è valido
unsigned int resp_size;
resp_data_t()
{
reset();
}
bool isEgualToBuffer(uint8_t* other_buffer, unsigned int *diff, unsigned int size_to_read)
{
*diff = 0;
for (int i= 0; i<size_to_read; i++)
{
if (resp_buffer[i]!=other_buffer[i])
{
*diff = i;
return false;
}
}
return true;
}
void reset()
{
isResponseOk = false;
memset(resp_buffer, 0, RFIF_TEST_READ_SIZE);
resp_size = 0;
}
void readBuffer(uint8_t*other_buffer, unsigned int size)
{
resp_size = size;
if (size<=RFIF_TEST_READ_SIZE)
{
isResponseOk = true;
for (int i = 0; i<resp_size; i++)
resp_buffer[i] = other_buffer[i];
}
}
};
static resp_data_t resp_data;
bool write_file_binary (std::string const & filename,
char const * data, size_t const bytes)
{
std::ofstream b_stream(filename.c_str(),
std::fstream::out | std::fstream::binary);
if (b_stream)
{
b_stream.write(data, bytes);
return (b_stream.good());
}
return false;
}
void FlashOperationRFIF::SaveBlobToFile(std::string const _file_name)
{
unsigned int size=grifo_fw::aesa_blob_used_size(grifo_fw::aesa_get_default_blob())+0xffu;
size&=~0xffu;
if (_file_name=="")
{
if (write_file_binary(FILE_NAME_MESSAGE,
(const char *)grifo_fw::aesa_get_default_blob(),
size ))
{
fif->log(type_log_info, "OK - write_file_binary");
}
else
{
fif->log(type_log_error, "ERROR - write_file_binary");
}
}
else
{
std::string file_name= FILE_NAME_PRE + _file_name + FILE_NAME_POST;
if (write_file_binary(file_name,
(const char *)grifo_fw::aesa_get_default_blob(),
size ))
{
fif->log(type_log_info, "OK - write_file_binary %s", file_name.c_str());
}
else
{
fif->log(type_log_error, "ERROR - write_file_binary %s", file_name.c_str());
}
}
}
void FlashOperationRFIF::SaveBufferToFile(std::string const _file_name,
const void* data,
unsigned int size)
{
std::string file_name= FILE_NAME_PRE + _file_name + FILE_NAME_POST;
if (write_file_binary(file_name,
(const char *)data,
size ))
{
fif->log(type_log_info, "OK - write_file_binary %s", file_name.c_str());
}
else
{
fif->log(type_log_error, "ERROR - write_file_binary %s", file_name.c_str());
}
}
//*****************************************
// INITIALIZE operations
// Inizialize mode register, set engine
// Input parameters: engine_ = fpga flash engine
// Returns:
//
//***********************************************************************
void FlashOperationRFIF::init(FpgaFlashEngineRFIF* engine_)
{
//riserva lo spazio di memoria necessario per il blob di comunicazione con l'AESA
unsigned int max_size_bytes = sizeof(grifo_fw::aesa_blob_t);
unsigned int aligned_size = max_size_bytes+128*2;
unsigned char* mem = new unsigned char[aligned_size];
if (mem==0)
{
fif->log(type_log_error, "aesa_blob out of memory");
return;
}
unsigned long raw_mem = (unsigned long)mem;
raw_mem=(raw_mem+127) & 0xFFFFFF80; //round to 128;
mem=(unsigned char*)raw_mem;
memset(mem, 0, max_size_bytes);
grifo_fw::aesa_initialize_raw_default_blob(mem);
grifo_fw::aesa_blob_clear(0);
engine=engine_;
}
//***********************************************************************
// get enable message confirm in tftp write operation
// Input parameters:
//
// Returns: true = if is enable
// false = if is disable
//***********************************************************************
bool FlashOperationRFIF::getEnableMsgBlk()
{
return enabledMsgBlk;
}
//***********************************************************************
// set enable message confirm in tftp write operation
// Input parameters: _enable = true if display confirm message
// = false if not display confirm message
//
// Returns:
//***********************************************************************
void FlashOperationRFIF::setEnableMsgBlk(bool _enabled)
{
enabledMsgBlk = _enabled;
}
//*****************************************
// INITIALIZE operations, 2.4.1.1 Inizializzazione
// Inizialize mode register, set engine
// Input parameters: a_moder_spimode = SPI mode x1 mode,x2 mode,x4 mode
// a_moder_byteaddress = 3 bytes address/4 bytes address
// a_moder_qspiport = primary Spi Port/secondary Spi Port
// Returns:
//
// Note 1: set register r_moder with correct configuration
//***********************************************************************
void FlashOperationRFIF::init()
{
grifo_fw::aesa_blob_clear(0);
}
//***********************************************************************
// Fpga write
// Input parameters: address = address to write
// data = buffer to write
// len = buffer's length
// mess = message to write into debug log
// Returns: true, no error
// false, generic error into write function
//***********************************************************************
bool FlashOperationRFIF::fpgaWrite(uint32_t address, const void* data, unsigned int len, const char* mess, unsigned int doorbell)
{
fif->log(type_log_info, "WRITE: 0x%X*%u %s",
//address*4,
address,
len, mess);
bool ok=fif->rtgWriteDB(address, data, len, doorbell);//address*4, data, len);
return ok;
}
//***********************************************************************
// Fpga Read
// Input parameters: address = address to read
// data = ouput buffer
// len = buffer's length
// mess = message to write into debug log
// Returns: true, no error
// false, generic error into read function
//***********************************************************************
bool FlashOperationRFIF::fpgaRead(uint32_t address, void* data, unsigned int len, const char* mess, unsigned int doorbell)
{
//fif->rtgWaitEvent(WAIT_TIME_MS);
fif->log(type_log_info, "READ request: 0x%X*%u CMD=%s",
address,
len,
mess);
bool ok=fif->rtgReadDB(address, data, len, doorbell);
fif->log(type_log_info, "READ response: 0x%X*%u CMD=%s",
address,
len,
mess);
return ok;
}
bool FlashOperationRFIF::processRfifStatus_OLD(const aesa::rfif_status_t sts,
unsigned int *bit7_CFGM_BUSY,
unsigned int *bit6_CFGM_TIMEOUT_FAIL)
{
unsigned int cti_crc_error = 0;
unsigned int cti_coding_error = 0;
cti_crc_error = (sts.byte_1.bit.cti_crc_error) || (sts.byte_5.bit.cti_crc_error);
cti_coding_error = (sts.byte_2.bit.cti_coding_error) || (sts.byte_5.bit.cti_coding_error);
fif->log(type_log_info, "->> Health status: %s", (sts.byte_0.bit.health_status==0 ? "Ok" : "Fail"));
fif->log(type_log_info, "->> Warning status: %s", (sts.byte_0.bit.warning_status==0 ? "Ok" : "Fail"));
fif->log(type_log_info, "->> CTI CRC: %s", (cti_crc_error==0 ? "No error" : "Error"));
fif->log(type_log_info, "->> CTI Coding: %s", (cti_coding_error==0 ? "No error" : "Error"));
fif->log(type_log_info, "->> Active board temp: %d", sts.byte_3.temperature_t1);
fif->log(type_log_info, "->> PSY/CTRL temp: %d", sts.byte_4.temperature_t2);
*bit6_CFGM_TIMEOUT_FAIL = (sts.byte_5.bit.cfgm_timeout_fail==0 ? 0:1);
*bit7_CFGM_BUSY = (sts.byte_5.bit.cfgm_busy==0 ? 0:1);;
return true;
}
bool FlashOperationRFIF::getParameters(unsigned int cmd,
unsigned int *rfif_cmd,
unsigned int *rfif_cmd_size,
unsigned int *rfif_response,
unsigned int *rfif_response_size,
QString *msg)
{
//configuro tutti i parametri per processare questo comando
switch (cmd)
{
case RFIF_READ_FW_STATUS_CMD:
*rfif_cmd = RFIF_READ_FW_STATUS_CMD;
*rfif_cmd_size = RFIF_READ_FW_STATUS_CMD_SIZE;
*rfif_response = RFIF_FIRMWARE_STATUS_RSP;
*rfif_response_size = RFIF_FIRMWARE_STATUS_RSP_SIZE;
*msg = QString(RFIF_READ_FW_STATUS_CMD_STR);
break;
case RFIF_READ_STATUS_CMD:
*rfif_cmd = RFIF_READ_STATUS_CMD;
*rfif_cmd_size = RFIF_READ_STATUS_CMD_SIZE;
*rfif_response = RFIF_STATUS_RSP;
*rfif_response_size = RFIF_STATUS_RSP_SIZE;
*msg = QString(RFIF_READ_STATUS_CMD_STR);
break;
case RFIF_READ_BIT_STATUS_CMD:
*rfif_cmd = RFIF_READ_BIT_STATUS_CMD;
*rfif_cmd_size = RFIF_READ_BIT_STATUS_CMD_SIZE;
*rfif_response = RFIF_BIT_STATUS_RSP;
*rfif_response_size = RFIF_BIT_STATUS_RSP_SIZE;
*msg = QString(RFIF_READ_BIT_STATUS_CMD_STR);
break;
case RFIF_CFGMEM_READ_DATA_CMD:
*rfif_cmd = RFIF_CFGMEM_READ_DATA_CMD;
*rfif_cmd_size = RFIF_CFGMEM_READ_DATA_CMD_SIZE;
*rfif_response = RFIF_CFGMEM_DATA_RSP;
*rfif_response_size = RFIF_CFGMEM_DATA_RSP_SIZE;
*msg = QString(RFIF_CFGMEM_READ_DATA_STR);
break;
case RFIF_CFGMEM_ERASE_DATA_CMD:
*rfif_cmd = RFIF_CFGMEM_ERASE_DATA_CMD;
*rfif_cmd_size = RFIF_CFGMEM_ERASE_DATA_CMD_SIZE;
*rfif_response = RFIF_STATUS_RSP;
*rfif_response_size = RFIF_STATUS_RSP_SIZE;
*msg = QString(RFIF_CFGMEM_ERASE_DATA_STR);
break;
case RFIF_CFGMEM_WRITE_DATA_CMD:
*rfif_cmd = RFIF_CFGMEM_WRITE_DATA_CMD;
*rfif_cmd_size = RFIF_CFGMEM_WRITE_DATA_CMD_SIZE;
*rfif_response = RFIF_STATUS_RSP;
*rfif_response_size = RFIF_STATUS_RSP_SIZE;
*msg = QString(RFIF_CFGMEM_WRITE_DATA_STR);
break;
break;
case RFIF_ETI_READ_BACK_CMD:
*rfif_cmd = RFIF_ETI_READ_BACK_CMD;
*rfif_cmd_size = RFIF_ETI_READ_BACK_CMD_SIZE;
*rfif_response = RFIF_ETI_READ_BACK_RSP;
*rfif_response_size = RFIF_ETI_READ_BACK_RSP_SIZE;
*msg = QString(RFIF_ETI_READ_BACK_CMD_STR);
break;
case CTI_READ_STATUS_CMD:
*rfif_cmd = CTI_READ_STATUS_CMD;
*rfif_cmd_size = CTI_READ_STATUS_CMD_SIZE;
*rfif_response = CTI_STATUS_RSP;
*rfif_response_size = CTI_STATUS_RSP_SIZE;
*msg = QString(CTI_READ_STATUS_CMD_STR);
break;
case AESA_READ_STATUS_CMD:
*rfif_cmd = AESA_READ_STATUS_CMD;
*rfif_cmd_size = AESA_READ_STATUS_CMD_SIZE;
*rfif_response = AESA_STATUS_RSP;
*rfif_response_size = AESA_STATUS_RSP_SIZE;
*msg = QString(AESA_READ_STATUS_CMD_STR);
break;
case AESA_READ_FIRMWARE_STATUS_CMD:
*rfif_cmd = AESA_READ_FIRMWARE_STATUS_CMD;
*rfif_cmd_size = AESA_READ_FIRMWARE_STATUS_CMD_SIZE;
*rfif_response = AESA_FIRMWARE_STATUS_RSP;
*rfif_response_size = AESA_FIRMWARE_STATUS_RSP_SIZE;
*msg = QString(AESA_READ_FIRMWARE_STATUS_CMD_STR);
break;
}
return true;
}
//***********************************************************************
// Send command and wait response
// Input parameters: cmd = address to send command
//
// Returns: false = error in sendCommand function
// true = No error
//***********************************************************************
bool FlashOperationRFIF::sendCommandToAesa(unsigned int cmd)
{
//invio messaggio da eseguire
if (!sendCommand(cmd))
{
fif->log(type_log_error, "MACRO - sendCommandToAesa, ERROR");
return false;
}
return true;
}
//***********************************************************************
// read_response_from_aesa
// Input parameters: src = data buffer arrive from AESA protocol
// max_size = dimension of data buffer
//
// Returns: aesa_rx_info = list of responses
//***********************************************************************
bool FlashOperationRFIF::isResponseOk(const void *src,
unsigned int max_size,
unsigned int *_count)
{
//static uint8_t buffer[AESA_RX_MESSAGE_MAX_SIZE];
grifo_fw::aesa_deserializer deserializer(src, max_size);
unsigned int count = 0;
unsigned int error = 0;
for (grifo_fw::aesa_message_descriptor_t msg=deserializer.extract(); msg.len_word>0; msg=deserializer.extract())
{
uint8_t *buffer = new uint8_t[AESA_RX_MESSAGE_MAX_SIZE];
memset(buffer, 0, AESA_RX_MESSAGE_MAX_SIZE);
grifo_fw::aesa_payload_swap(buffer, msg.data, (msg.len_word-1)*4);
// fill parameters
count++;
aesa_rx_info[count-1].rx_buffer=buffer;
aesa_rx_info[count-1].length=(msg.len_word-1)*4;
aesa_rx_info[count-1].payload_len=msg.payload_len;
aesa_rx_info[count-1].status=msg.sts;
if (msg.sts!=grifo_fw::aesa_message_descriptor_t::ok)
{
fif->log(type_log_error, "%s on received message",
(msg.sts==grifo_fw::aesa_message_descriptor_t::crc_error ? "CRC ERROR" :
msg.sts==grifo_fw::aesa_message_descriptor_t::timeout ? "TIMEOUT" :
msg.sts==grifo_fw::aesa_message_descriptor_t::len_error ? "LEN ERROR" : "UNKNOWN ERROR"));
error = 1;
}
switch (buffer[0])
{
case CTI_STATUS_RSP:
fif->log(type_log_info, "RSP: 0x%2.2X CTI_STATUS_RSP", buffer[0]);
break;
case AESA_FIRMWARE_STATUS_RSP:
fif->log(type_log_info, "RSP: 0x%2.2X AESA_FIRMWARE_STATUS_RSP", buffer[0]);
break;
case RFIF_FIRMWARE_STATUS_RSP:
fif->log(type_log_info, "RSP: 0x%2.2X RFIF_FIRMWARE_STATUS_RSP", buffer[0]);
break;
case AESA_STATUS_RSP:
fif->log(type_log_info, "RSP: 0x%2.2X AESA_STATUS_RSP", buffer[0]);
break;
case RFIF_STATUS_RSP:
fif->log(type_log_info, "RSP: 0x%2.2X RFIF_STATUS_RSP", buffer[0]);
break;
case RFIF_BIT_STATUS_RSP:
fif->log(type_log_info, "RSP: 0x%2.2X RFIF_BIT_STATUS_RSP", buffer[0]);
break;
case CTI_IMU_STATUS_RSP:
fif->log(type_log_info, "RSP: 0x%2.2X CTI_IMU_STATUS_RSP", buffer[0]);
break;
case AESA_BROADCAST_STATUS_RSP:
fif->log(type_log_info, "RSP: 0x%2.2X AESA_BROADCAST_STATUS_RSP",buffer[0]);
break;
case RFIF_ETI_READ_BACK_RSP:
fif->log(type_log_info, "RSP: %2.2X RFIF_ETI_READ_BACK_RSP", buffer[0]);
break;
case RFIF_CFGMEM_DATA_RSP:
fif->log(type_log_info, "RSP: 0x%2.2X RFIF_CFGMEM_DATA_RSP", buffer[0]);
break;
default:
fif->log(type_log_info, "RSP: Unknown message 0x%2.2X", buffer[0]);
}
}
*_count = count;
return (error==0 ? true : false);
}
void FlashOperationRFIF::processAesaFwStatus(const aesa::aesa_firmware_status_t* sts)
{
//#[ operation processAesaFwStatus(const aesa::aesa_firmware_status_t*)
fif->log(type_log_info, "FUN: processAesaFwStatus");
unsigned int minor=sts->aesa_fw_status_1.cti_fw_version.minor;
unsigned int major=sts->aesa_fw_status_1.cti_fw_version.major;
//fif->log(type_log_info, ">>AESA CTI FW v%d.%d", major, minor);
fif->notify(s_end, -1, ">>AESA CTI FW v%d.%d", major, minor);
minor=sts->aesa_fw_status_2.cti_nvm_version.minor;
major=sts->aesa_fw_status_2.cti_nvm_version.major;
//fif->log(type_log_info, ">>AESA CTI NVM v%d.%d", major, minor);
fif->notify(s_end, -1, ">>AESA CTI NVM v%d.%d", major, minor);
}
void FlashOperationRFIF::processRfifFwStatus(const aesa::rfif_fw_status_t* sts)
{
fif->log(type_log_info, "FUN: processRfifFwStatus");
//fif->log(type_log_info, ">>RFIF v%d.%d", sts->byte_0.fw_version, sts->byte_1.fw_release);
fif->notify(s_end, -1, ">>RFIF v%d.%d", sts->byte_0.fw_version, sts->byte_1.fw_release);
}
bool FlashOperationRFIF::processRfifStatus(const aesa::rfif_status_t* sts)
{
//#[ operation processRfifStatus(const aesa::rfif_status_t*)
unsigned int comm_errors=0;
fif->log(type_log_info, "FUN: processRfifStatus");
lastRFIFBusy = sts->byte_5.bit.cfgm_busy;
lastRFIFTimeOutError = sts->byte_5.bit.cfgm_timeout_fail;
if (lastRFIFBusy)
fif->notify(s_warning, -1,">> CFGM Busy");
if (lastRFIFTimeOutError)
{
fif->notify(s_error, -1,">> CFGM Timeout fail");
return false;
}
#ifdef MAX_LOG
if (sts->byte_0.bit.health_status==1)
fif->notify(s_error, -1,">>Health status: %s", (sts->byte_0.bit.health_status==0 ? "Ok" : "Fail"));
else
fif->notify(s_status, -1,">>Health status: %s", (sts->byte_0.bit.health_status==0 ? "Ok" : "Fail"));
if (sts->byte_0.bit.warning_status==1)
fif->notify(s_error, -1,">>Warning status: %s", (sts->byte_0.bit.warning_status==0 ? "Ok" : "Fail"));
else
fif->notify(s_status, -1,">>Warning status: %s", (sts->byte_0.bit.warning_status==0 ? "Ok" : "Fail"));
if (sts->byte_1.bit.cti_crc_error==1)
fif->notify(s_error, -1,">>CTI CRC: %s", (sts->byte_1.bit.cti_crc_error==0 ? "No error" : "Error"));
else
fif->notify(s_end, -1,">>CTI CRC: %s", (sts->byte_1.bit.cti_crc_error==0 ? "No error" : "Error"));
if (sts->byte_2.bit.cti_coding_error==1)
fif->notify(s_error, -1,">>CTI Coding: %s", (sts->byte_2.bit.cti_coding_error==0 ? "No error" : "Error"));
else
fif->notify(s_end, -1,">>CTI Coding: %s", (sts->byte_2.bit.cti_coding_error==0 ? "No error" : "Error"));
fif->notify(s_status, -1,">>Active board temp: %d", sts->byte_3.temperature_t1);
fif->notify(s_status, -1,">>PSY/CTRL temp: %d", sts->byte_4.temperature_t2);
if (sts->byte_5.bit.rfif_rxn1_lost)
{
fif->notify(s_error, -1,">>RxN1 lost");
}
if (sts->byte_5.bit.rfif_rxn2_lost)
{
fif->notify(s_error, -1,">>RxN2 lost");
}
#else
fif->log(type_log_info, ">>Health status: %s", (sts->byte_0.bit.health_status==0 ? "Ok" : "Fail"));
fif->log(type_log_info, ">>Warning status: %s", (sts->byte_0.bit.warning_status==0 ? "Ok" : "Fail"));
fif->log(type_log_info, ">>CTI CRC: %s", (sts->byte_1.bit.cti_crc_error==0 ? "No error" : "Error"));
fif->log(type_log_info, ">>CTI Coding: %s", (sts->byte_2.bit.cti_coding_error==0 ? "No error" : "Error"));
fif->log(type_log_info, ">>Active board temp: %d", sts->byte_3.temperature_t1);
fif->log(type_log_info, ">>PSY/CTRL temp: %d", sts->byte_4.temperature_t2);
if (sts->byte_5.bit.rfif_rxn1_lost)
{
fif->log(type_log_info, ">>RxN1 lost");
}
if (sts->byte_5.bit.rfif_rxn2_lost)
{
fif->log(type_log_info, ">>RxN2 lost");
}
#endif
if (sts->byte_1.bit.cti_crc_error)
{
comm_errors|=eACCtiCRCErr;
}
if (sts->byte_2.bit.cti_coding_error)
{
comm_errors|=eACCtiCodingErr;
}
if (sts->byte_5.bit.rfif_rxn1_lost || sts->byte_5.bit.rfif_rxn2_lost)
{
comm_errors|=eACCtiDutyPulseErr;
}
if (sts->byte_0.bit.health_status || sts->byte_0.bit.warning_status)
{
comm_errors|=eACCtiBeamErr;
}
return true;
}
void FlashOperationRFIF::processCTIStatus(const aesa::cti_status_t* sts)
{
//#[ operation processCTIStatus(const aesa::cti_status_t*)
unsigned int cti_comm_fail_mask=0;
fif->log(type_log_info, "FUN: processCTIStatus");
bool cti_comm_err=false;
#ifdef MAX_LOG
if (sts->byte_0.bit.coding_error)
{
fif->notify(s_error, -1,">>Coding error");
cti_comm_err=true;
cti_comm_fail_mask|=eACCtiCodingErr;
}
if (sts->byte_0.bit.crc_error)
{
fif->notify(s_error, -1,">>CRC error");
cti_comm_err=true;
cti_comm_fail_mask|=eACCtiCRCErr;
}
if (sts->byte_0.bit.cti_flash_ibit_fail)
fif->notify(s_error, -1,">>CTI flash ibit fail");
if (sts->byte_0.bit.nvm_config_write_complete)
fif->notify(s_error, -1,">>NVM cfg wr done");
if (sts->byte_0.bit.flash_config_memory_error)
fif->notify(s_error, -1,">>FLASH cfg mem error");
if (sts->byte_0.bit.cti_fram_ibit_error)
fif->notify(s_error, -1,">>CTI FRAM ibit error");
if (sts->byte_0.bit.cti_fram_memory_error)
fif->notify(s_error, -1,">>CTI FRAM mem error");
if (sts->byte_1.bit.tx_rx_pulse_width_error)
{
fif->notify(s_error, -1,">>TX/RX pulse width error");
cti_comm_err=true;
cti_comm_fail_mask|=eACCtiDutyPulseErr;
}
if (sts->byte_1.bit.tx_rx_duty_ratio_error)
{
fif->notify(s_error, -1,">>TX/RX duty ratio error");
cti_comm_err=true;
cti_comm_fail_mask|=eACCtiDutyPulseErr;
}
if (sts->byte_1.bit.cti_factory_image_active)
fif->notify(s_status, -1,">>CTI fact img active");
if (sts->byte_1.bit.cmd_link1_message_fail)
{
fif->notify(s_status, -1,">>Link 1 msg fail");
cti_comm_err=true;
cti_comm_fail_mask|=eACCtiLinkErr;
}
if (sts->byte_1.bit.cmd_link2_message_fail)
fif->notify(s_error, -1,">>Link 2 msg fail");
if (sts->byte_1.bit.px_uv_beam_pointing_cmd_error)
{
fif->notify(s_error, -1,">>U/V beam point error");
cti_comm_err=true;
cti_comm_fail_mask|=eACCtiBeamErr;
}
if (sts->byte_1.bit.array_err_log_checksum_error)
fif->notify(s_error, -1,">>Array err log chk error");
if (sts->byte_2.bit.rf_end_to_end_test_complete)
fif->notify(s_error, -1,">>RF end-to-end test done");
if (sts->byte_2.bit.rf_end_to_end_test_error)
fif->notify(s_error, -1,">>RF end-to-end test error");
if (sts->byte_2.bit.redundant_link_lost)
fif->notify(s_error, -1,">>Redundant link l lost");
fif->notify(s_status, -1,">>CTI temp=%d deg.", sts->byte_3.cti_temperature);
if (cti_comm_err)
{
fif->notify(s_error, -1,"CTI DECODING: %2.2X:%2.2X:%2.2X",
(unsigned int)sts->byte_0.raw,
(unsigned int)sts->byte_1.raw,
(unsigned int)sts->byte_2.raw);
}
#else
if (sts->byte_0.bit.coding_error)
{
fif->log(type_log_error, ">>Coding error");
cti_comm_err=true;
cti_comm_fail_mask|=eACCtiCodingErr;
}
if (sts->byte_0.bit.crc_error)
{
fif->log(type_log_error, ">>CRC error");
cti_comm_err=true;
cti_comm_fail_mask|=eACCtiCRCErr;
}
if (sts->byte_0.bit.cti_flash_ibit_fail)
fif->log(type_log_error, ">>CTI flash ibit fail");
if (sts->byte_0.bit.nvm_config_write_complete)
fif->log(type_log_error, ">>NVM cfg wr done");
if (sts->byte_0.bit.flash_config_memory_error)
fif->log(type_log_error, ">>FLASH cfg mem error");
if (sts->byte_0.bit.cti_fram_ibit_error)
fif->log(type_log_error, ">>CTI FRAM ibit error");
if (sts->byte_0.bit.cti_fram_memory_error)
fif->log(type_log_error, ">>CTI FRAM mem error");
if (sts->byte_1.bit.tx_rx_pulse_width_error)
{
fif->log(type_log_error, ">>TX/RX pulse width error");
cti_comm_err=true;
cti_comm_fail_mask|=eACCtiDutyPulseErr;
}
if (sts->byte_1.bit.tx_rx_duty_ratio_error)
{
fif->log(type_log_error, ">>TX/RX duty ratio error");
cti_comm_err=true;
cti_comm_fail_mask|=eACCtiDutyPulseErr;
}
if (sts->byte_1.bit.cti_factory_image_active)
fif->log(type_log_error, ">>CTI fact img active");
if (sts->byte_1.bit.cmd_link1_message_fail)
{
fif->log(type_log_error, ">>Link 1 msg fail");
cti_comm_err=true;
cti_comm_fail_mask|=eACCtiLinkErr;
}
if (sts->byte_1.bit.cmd_link2_message_fail)
fif->log(type_log_error, ">>Link 2 msg fail");
if (sts->byte_1.bit.px_uv_beam_pointing_cmd_error)
{
fif->log(type_log_error, ">>U/V beam point error");
cti_comm_err=true;
cti_comm_fail_mask|=eACCtiBeamErr;
}
if (sts->byte_1.bit.array_err_log_checksum_error)
fif->log(type_log_error, ">>Array err log chk error");
if (sts->byte_2.bit.rf_end_to_end_test_complete)
fif->log(type_log_error, ">>RF end-to-end test done");
if (sts->byte_2.bit.rf_end_to_end_test_error)
fif->log(type_log_error, ">>RF end-to-end test error");
if (sts->byte_2.bit.redundant_link_lost)
fif->log(type_log_error, ">>Redundant link l lost");
fif->log(type_log_info, ">>CTI temp=%d deg.", sts->byte_3.cti_temperature);
if (cti_comm_err)
{
fif->notify(s_error, -1,"CTI DECODING: %2.2X:%2.2X:%2.2X",
(unsigned int)sts->byte_0.raw,
(unsigned int)sts->byte_1.raw,
(unsigned int)sts->byte_2.raw);
/*fif->log(type_log_error, "CTI DECODING: %2.2X:%2.2X:%2.2X",
(unsigned int)sts->byte_0.raw,
(unsigned int)sts->byte_1.raw,
(unsigned int)sts->byte_2.raw);*/
}
#endif
}
void FlashOperationRFIF::processRfifBitStatus(const aesa::rfif_bit_status_t* sts)
{
//#[ operation processRfifBitStatus(const aesa::rfif_bit_status_t*)
static unsigned int fail_latch;
fif->log(type_log_info, "FUN: processRfifBitStatus");
#ifdef MAX_LOG
if (sts->byte_2.bit.temp_warning_t1)
fif->notify(s_error, -1,">>temp_warning_t1");
if (sts->byte_3.bit.temp_failure_t1)
fif->notify(s_error, -1,">>temp_failure_t1");
if (sts->byte_2.bit.temp_warning_t2)
fif->notify(s_error, -1,">>temp_warning_t2");
if (sts->byte_3.bit.temp_failure_t2)
fif->notify(s_error, -1,">>temp_failure_t2");
if (sts->byte_2.bit.clk1_missing)
fif->notify(s_error, -1,">>clk1_missing");
if (sts->byte_2.bit.clk2_missing)
fif->notify(s_error, -1,">>clk2_missing");
if (sts->byte_2.bit.rfif_data2_lost)
fif->notify(s_error, -1,">>rfif_data2_lost");
if (sts->byte_2.bit.rfif_data1_lost)
fif->notify(s_error, -1,">>rfif_data1_lost");
if (sts->byte_2.bit.rxn1_missing)
fif->notify(s_error, -1,">>rxn1_missing");
if (sts->byte_2.bit.rxn2_missing)
fif->notify(s_error, -1,">>rxn2_missing");
if (sts->byte_5.bit.over_duty)
{
fif->notify(s_error, -1,">>Over-duty");
}
if (sts->byte_5.bit.over_pulse)
{
fif->notify(s_error, -1,">>Over-pulse");
}
#else
if (sts->byte_5.bit.over_duty)
{
fif->log(type_log_error, ">>Over-duty");
}
if (sts->byte_5.bit.over_pulse)
{
fif->log(type_log_error, ">>Over-pulse");
}
#endif
}
void FlashOperationRFIF::processRfifCFGMemStatus(uint8_t *data, unsigned int len_payload)
{
uint8_t value = data[len_payload-1];
bool rfif_coding_error = value & (1 << 0);
bool rfif_response_timeout = value & (1 << 1);
fif->log(type_log_info, ">>rfif_coding_error %d", rfif_coding_error);
fif->log(type_log_info, ">>rfif_response_timeout %d", rfif_response_timeout);
resp_data.reset();
resp_data.readBuffer(data , len_payload-1);
//for (int i = 0; i<len_payload-1; i++)
// fif->log(type_log_info, "[%d] = %d", i, resp_data.resp_buffer[i]);
//fif->log(type_log_info, "[%d] = %d", i, data[i]);
}
/*void FlashOperationRFIF::processRfifCFGMemStatus(uint8_t *data, unsigned int len_payload)
{
uint8_t value = data[AESA_RX_CFGMEM_MAX_SIZE-1];
bool rfif_coding_error = value & (1 << 0);
bool rfif_response_timeout = value & (1 << 1);
fif->log(type_log_info, ">>rfif_coding_error %d", rfif_coding_error);
fif->log(type_log_info, ">>rfif_response_timeout %d", rfif_response_timeout);
for (int i = 0; i<AESA_RX_CFGMEM_MAX_SIZE-1; i++)
fif->log(type_log_info, "[%d] = %d", i, data[i]);
}*/
void FlashOperationRFIF::processAesaStatus(const AesaStatusResponse* sts)
{
//#[ operation processAesaStatus(const AesaStatusResponse*)
fif->log(type_log_info, "FUN: processAesaStatus");
aesaStatus=*sts;
processCTIStatus(&sts->cti_sts);
unsigned int first_plank=sts->first_plank;
unsigned int last_plank=sts->last_plank;
if ((first_plank<1) || (first_plank>NUM_PLANK_PCBS) || (last_plank<first_plank))
{
fif->log(type_log_error, "Invalid payload plank id!");
return;
}
else
{
fif->notify(s_read_id, -1, ">>AESA first plank %d - last plank %d", first_plank, last_plank);
}
}
//***********************************************************************
// read_response_from_aesa
// Input parameters: src = data buffer arrive from AESA protocol
// max_size = dimension of data buffer
//
// Returns: aesa_rx_info = list of responses
//***********************************************************************
bool FlashOperationRFIF::decodeAesaResponse(unsigned int idx)
{
bool res = true;
switch (aesa_rx_info[idx].rx_buffer[0])
{
case CTI_STATUS_RSP:
#ifdef MAX_LOG
fif->notify(s_status, -1,"RSP: CTI_STATUS_RSP[0x%X], len %d ", CTI_STATUS_RSP, aesa_rx_info[idx].payload_len);
#else
fif->log(type_log_info, "RSP: CTI_STATUS_RSP[0x%X], len %d ", CTI_STATUS_RSP, aesa_rx_info[idx].payload_len);
#endif
processCTIStatus(reinterpret_cast<const aesa::cti_status_t*>(&aesa_rx_info[idx].rx_buffer[2]));
break;
case AESA_FIRMWARE_STATUS_RSP:
#ifdef MAX_LOG
fif->notify(s_status, -1,"RSP: AESA_FIRMWARE_STATUS_RSP[0x%X], len %d ", AESA_FIRMWARE_STATUS_RSP, aesa_rx_info[idx].payload_len);
#else
fif->log(type_log_info, "RSP: AESA_FIRMWARE_STATUS_RSP[0x%X], len %d ", AESA_FIRMWARE_STATUS_RSP, aesa_rx_info[idx].payload_len);
#endif
processAesaFwStatus(reinterpret_cast<const aesa::aesa_firmware_status_t*>(&aesa_rx_info[idx].rx_buffer[2]));
break;
case RFIF_FIRMWARE_STATUS_RSP:
#ifdef MAX_LOG
fif->notify(s_status, -1,"RSP: RFIF_FIRMWARE_STATUS_RSP[0x%X], len %d ", RFIF_FIRMWARE_STATUS_RSP, aesa_rx_info[idx].payload_len);
#else
fif->log(type_log_info, "RSP: RFIF_FIRMWARE_STATUS_RSP[0x%X], len %d ", RFIF_FIRMWARE_STATUS_RSP, aesa_rx_info[idx].payload_len);
#endif
last_rfif_fw_status = reinterpret_cast<aesa::rfif_fw_status_t*>(&aesa_rx_info[idx].rx_buffer[2]);
processRfifFwStatus(reinterpret_cast<const aesa::rfif_fw_status_t*>(&aesa_rx_info[idx].rx_buffer[2]));
break;
case AESA_STATUS_RSP:
#ifdef MAX_LOG
fif->notify(s_status, -1,"RSP: AESA_STATUS_RSP[0x%X], len %d", AESA_STATUS_RSP, aesa_rx_info[idx].payload_len);
#else
fif->log(type_log_info, "RSP: AESA_STATUS_RSP[0x%X], len %d", AESA_STATUS_RSP, aesa_rx_info[idx].payload_len);
#endif
processAesaStatus(reinterpret_cast<const AesaStatusResponse*>(&aesa_rx_info[idx].rx_buffer[2]));
break;
case RFIF_STATUS_RSP:
#ifdef MAX_LOG
fif->notify(s_status, -1,"RSP: RFIF_STATUS_RSP[0x%X], len %d ", RFIF_STATUS_RSP, aesa_rx_info[idx].payload_len);
#else
fif->log(type_log_info, "RSP: RFIF_STATUS_RSP[0x%X], len %d ", RFIF_STATUS_RSP, aesa_rx_info[idx].payload_len);
#endif
last_rfif_status = reinterpret_cast<aesa::rfif_status_t*>(&aesa_rx_info[idx].rx_buffer[2]);
res = processRfifStatus(last_rfif_status);
last_rfif_status_ok = true;
break;
case RFIF_BIT_STATUS_RSP:
#ifdef MAX_LOG
fif->notify(s_status, -1,"RSP: RFIF_BIT_STATUS_RSP[0x%X], len %d ", RFIF_BIT_STATUS_RSP, aesa_rx_info[idx].payload_len);
#else
fif->log(type_log_info, "RSP: RFIF_BIT_STATUS_RSP[0x%X], len %d ", RFIF_BIT_STATUS_RSP, aesa_rx_info[idx].payload_len);
#endif
last_rfif_bit_status = reinterpret_cast<aesa::rfif_bit_status_t*>(&aesa_rx_info[idx].rx_buffer[2]);
processRfifBitStatus(reinterpret_cast<const aesa::rfif_bit_status_t*>(&aesa_rx_info[idx].rx_buffer[2]));
break;
case CTI_IMU_STATUS_RSP:
#ifdef MAX_LOG
fif->notify(s_status, -1,"RSP: CTI_IMU_STATUS_RSP[0x%X], len %d ", CTI_IMU_STATUS_RSP, aesa_rx_info[idx].payload_len);
#else
fif->log(type_log_info, "RSP: CTI_IMU_STATUS_RSP[0x%X], len %d ", CTI_IMU_STATUS_RSP, aesa_rx_info[idx].payload_len);
#endif
// nothing to process, since IMU status is an empty message
break;
case AESA_BROADCAST_STATUS_RSP:
#ifdef MAX_LOG
fif->notify(s_status, -1,"RSP: AESA_BROADCAST_STATUS_RSP[0x%X], len %d ", AESA_BROADCAST_STATUS_RSP, aesa_rx_info[idx].payload_len);
#else
fif->log(type_log_info, "RSP: AESA_BROADCAST_STATUS_RSP[0x%X], len %d ", AESA_BROADCAST_STATUS_RSP, aesa_rx_info[idx].payload_len);
#endif
//processAesaBroadcastStatus(reinterpret_cast<const aesa_plank_reply_status_t*>(&resp_ptr[2]));
break;
case RFIF_ETI_READ_BACK_RSP:
#ifdef MAX_LOG
fif->notify(s_status, -1,"RSP: RFIF_ETI_READ_BACK_RSP[0x%X], len %d", RFIF_ETI_READ_BACK_RSP, aesa_rx_info[idx].payload_len);
#else
fif->log(type_log_info, "RSP: RFIF_ETI_READ_BACK_RSP[0x%X], len %d", RFIF_ETI_READ_BACK_RSP, aesa_rx_info[idx].payload_len);
#endif
//processRfifEtiReadbactStatus(reinterpret_cast<const aesa::rfif_eti_readback_status_t*>(&aesa_rx_info.rx_buffer[2]));
break;
case RFIF_CFGMEM_DATA_RSP:
#ifdef MAX_LOG
fif->notify(s_status, -1,"RSP: RFIF_CFGMEM_DATA_RSP[0x%X], len %d", RFIF_CFGMEM_DATA_RSP, aesa_rx_info[idx].payload_len);
#else
fif->log(type_log_info, "RSP: RFIF_CFGMEM_DATA_RSP[0x%X], len %d", RFIF_CFGMEM_DATA_RSP, aesa_rx_info[idx].payload_len);
#endif
processRfifCFGMemStatus(reinterpret_cast<uint8_t *>(&aesa_rx_info[idx].rx_buffer[2]),RFIF_TEST_READ_SIZE+1);
break;
default:
fif->log(type_log_info, "RSP: Unknown message 0x%2.2X", aesa_rx_info[idx].rx_buffer[0]);
}
return res;
}
//***********************************************************************
// Send command
// Input parameters: cmd = ??
//
// Returns: false = error in sendCommand function
// true = No error
//***********************************************************************
bool FlashOperationRFIF::sendCommand(unsigned int cmd)
{
unsigned int rfif_cmd = 0;
unsigned int rfif_cmd_size = 0;
unsigned int rfif_response = 0;
unsigned int rfif_response_size = 0;
QString msg = "";
getParameters(cmd,
&rfif_cmd,
&rfif_cmd_size,
&rfif_response,
&rfif_response_size,
&msg);
bool res = false;
unsigned int size=grifo_fw::aesa_blob_used_size(grifo_fw::aesa_get_default_blob())+0xffu;
size&=~0xffu;
//unsigned int doorbell=bsp_srio_mini_drv_no_doorbell;
unsigned int doorbell = grifo_fw::AESA_TX_A_EVENT;
res = fpgaWrite(grifo_fw::AESA_TX_A, grifo_fw::aesa_get_default_blob() , size, msg.toStdString().c_str(), doorbell);
#ifdef WRITE_FILE_BIN
SaveBlobToFile("fpgaWrite");
#endif
if (!res)
{
fif->log(type_log_error, "ERROR - fpgaWrite - send command %s", msg);
return false;
}
if (!reply)
{
reply = new uint8_t[AESA_RX_MESSAGE_MAX_SIZE];
}
else
{
memset(reply, 0, AESA_RX_MESSAGE_MAX_SIZE);
}
doorbell = grifo_fw::AESA_RX_A_EVENT;
res =fpgaRead(grifo_fw::AESA_RX_A, reply , AESA_RX_MESSAGE_MAX_SIZE,msg.toStdString().c_str(), doorbell);
#ifdef WRITE_FILE_BIN
SaveBufferToFile("fpgaRead", reply, AESA_RX_MESSAGE_MAX_SIZE);
#endif
if (!res)
{
fif->log(type_log_error, "ERROR - fpgaRead - send command %s", msg);
return false;
}
if (!reply)
{
fif->log(type_log_error, "ERROR - response is empty.");
return false;
}
//analisi delle risposte
unsigned int num_response_arrived = 0;
memset(aesa_rx_info, 0, sizeof aesa_rx_info);
res = isResponseOk(reply, AESA_RX_MESSAGE_MAX_SIZE, &num_response_arrived);
if (!res)
{
fif->log(type_log_error, "ERROR - Response is NOT ok");
return false;
}
//controllo sul numero di risposte arrivate
if (num_response_arrived==0)
{
fif->log(type_log_error, "ERROR - No response arrived.");
return false;
}
bool cti_sts = false;
last_rfif_status_ok = false;
//analizzo le risposte che sono arrivate per procedere di conseguenza.
for (int i = 0; i<num_response_arrived; i++)
{
cti_sts = decodeAesaResponse(i);
}
return true;
}
//***********************************************************************
// Read Flash ID
// Input parameters:
// Returns: "" if no able to read flash ID
// "<flashid string" contains the flash id
// Note 1: ATTENTION! this fuction is required to Unlock FPGA interface
// Note 2: r_moder = 0x08 if secondary FLASH, 0x00 if primary FLASH
//***********************************************************************
bool FlashOperationRFIF::readFlashID()
{
fif->log(type_log_info, "-> MACRO - Unlocking FPGA interface, read FLASH ID, first step");
return true;
}
//***********************************************************************
// Erase sector
// Input parameters: sector = n. sector to erase
//
// Returns: true if ok
// false if error
//***********************************************************************
bool FlashOperationRFIF::eraseRFIFCFGMem(unsigned long sector_address, unsigned int sector_size)
{
fif->log(type_log_info, "Sector address to erase : @0x%lX for %lX bytes", sector_address, sector_size);
grifo_fw::aesa_blob_clear(0);
grifo_fw::aesa_append_rfif_cfgmem_erase_data(0, sector_address, sector_size, grifo_fw::sync_immediately,RFIF_STATUS_TIMEOUT_MS);
#ifdef MAX_LOG
fif->notify(s_status, -1,"CMD: RFIF_CFGMEM_ERASE_DATA_CMD[0x%X]", RFIF_CFGMEM_ERASE_DATA_CMD);
#endif
if (!sendCommandToAesa(RFIF_CFGMEM_ERASE_DATA_CMD))
{
fif->log(type_log_error, "Erase test sector, ERROR");
return false;
}
//check response to confirm operations
fif->log(type_log_info, "Erase test sector, done");
return true;
}
//***********************************************************************
// Erase sector
// Input parameters: sector = n. sector to erase
//
// Returns: true if ok
// false if error
//***********************************************************************
bool FlashOperationRFIF::readRFIFCFGMem(unsigned long sector_address, unsigned int sector_size)
{
fif->log(type_log_info, "Sector address to read : @0x%lX for %lX bytes", sector_address, sector_size);
grifo_fw::aesa_blob_clear(0);
grifo_fw::aesa_append_rfif_cfgmem_read_data(0, sector_address, sector_size, grifo_fw::sync_immediately,RFIF_STATUS_TIMEOUT_MS);
#ifdef MAX_LOG
fif->notify(s_status, -1,"CMD: RFIF_CFGMEM_READ_DATA_CMD[0x%X]", RFIF_CFGMEM_READ_DATA_CMD);
#endif
if (!sendCommandToAesa(RFIF_CFGMEM_READ_DATA_CMD))
{
fif->log(type_log_error, "Read test sector, ERROR");
return false;
}
//check response to confirm operations
fif->log(type_log_info, "Read test sector, done");
return true;
}
//***********************************************************************
// writeRFIFCFGMem
// Input parameters: sector = n. sector to write
//
// Returns: true if ok
// false if error
//***********************************************************************
bool FlashOperationRFIF::writeRFIFCFGMem(unsigned long sector_address, unsigned int sector_size, const char* data)
{
fif->log(type_log_info, "Write RAMP, sector address to write : @0x%lX for %lX bytes", sector_address, sector_size);
grifo_fw::aesa_blob_clear(0);
grifo_fw::aesa_append_rfif_cfgmem_write_data(0, sector_address, sector_size, data, grifo_fw::sync_immediately,RFIF_STATUS_TIMEOUT_MS);
#ifdef MAX_LOG
fif->notify(s_status, -1,"CMD: RFIF_CFGMEM_WRITE_DATA_CMD[0x%X]", RFIF_CFGMEM_WRITE_DATA_CMD);
#endif
if (!sendCommandToAesa(RFIF_CFGMEM_WRITE_DATA_CMD))
{
fif->log(type_log_error, "write sector, ERROR");
return false;
}
//check response to confirm operations
fif->log(type_log_info, "Write sector, done");
return true;
}
//***********************************************************************
// writeRFIFCFGMem
// Input parameters: sector = n. sector to write
//
// Returns: true if ok
// false if error
//***********************************************************************
bool FlashOperationRFIF::writeRampRFIFCFGMem(unsigned long sector_address, unsigned int sector_size)
{
const unsigned int dim_buffer = PAYLOAD_BYTES*2;
//const unsigned int dim_buffer = 256;
static uint8_t dummy_buffer[dim_buffer];
memset(dummy_buffer, 0, dim_buffer);
for(unsigned int i=0; i<sizeof dummy_buffer; ++i)
dummy_buffer[i]=i;
fif->log(type_log_info, "Write RAMP, sector address to write : @0x%lX for %lX bytes", sector_address, dim_buffer);
grifo_fw::aesa_blob_clear(0);
grifo_fw::aesa_append_rfif_cfgmem_write_data(0, sector_address, PAYLOAD_BYTES*2,(const char*) dummy_buffer, grifo_fw::sync_immediately,RFIF_STATUS_TIMEOUT_MS);
#ifdef MAX_LOG
fif->notify(s_status, -1,"CMD: RFIF_CFGMEM_WRITE_DATA_CMD[0x%X]", RFIF_CFGMEM_WRITE_DATA_CMD);
#endif
#ifdef WRITE_FILE_BIN
write_file_binary ("writeramp.bin",(const char*) dummy_buffer, dim_buffer);
#endif
if (!sendCommandToAesa(RFIF_CFGMEM_WRITE_DATA_CMD))
{
fif->log(type_log_error, "write sector, ERROR");
return false;
}
//check response to confirm operations
fif->log(type_log_info, "Write sector, done");
return true;
}
//***********************************************************************
// read versions of RFIF Firmware
// Input parameters:
// Returns: true = no errors, ready for another command
// false = error, there is a problem or not responds.
//***********************************************************************
bool FlashOperationRFIF::sendRFIFGetVersionCmd()
{
fif->log(type_log_info, "Request RFIF FW version.");
grifo_fw::aesa_blob_clear(0);
//grifo_fw::aesa_append_aesa_fw_status(0, grifo_fw::sync_immediately, AESA_READ_FW_STATUS_TIMEOUT_US);
//message_count=grifo_fw::aesa_get_msg_counter();
grifo_fw::aesa_append_rfif_read_fw_status(0, grifo_fw::sync_immediately, AESA_RFIF_READ_FW_STATUS_TIMEOUT_US);
#ifdef MAX_LOG
fif->notify(s_status, -1,"CMD: RFIF_READ_FW_STATUS_CMD[0x%X]", RFIF_READ_FW_STATUS_CMD);
#endif
#ifdef WRITE_FILE_BIN
SaveBlobToFile("sendRFIFGetVersionCmd");
#endif
if (!sendCommandToAesa(RFIF_READ_FW_STATUS_CMD))
{
fif->log(type_log_error, "Request RFIF FW versions, ERROR");
return false;
}
return true;
}
//***********************************************************************
// read versions of Aesa Firmware
// Input parameters:
// Returns: true = no errors, ready for another command
// false = error, there is a problem or not responds.
//***********************************************************************
bool FlashOperationRFIF::sendAESAGetVersionCmd()
{
fif->log(type_log_info, "Request Aesa FW version.");
grifo_fw::aesa_blob_clear(0);
grifo_fw::aesa_append_aesa_fw_status(0, grifo_fw::sync_immediately, AESA_READ_FW_STATUS_TIMEOUT_US);
#ifdef WRITE_FILE_BIN
SaveBlobToFile("sendAESAGetVersionCmd");
#endif
#ifdef MAX_LOG
fif->notify(s_status, -1,"CMD: AESA_READ_FIRMWARE_STATUS_CMD[0x%X]", AESA_READ_FIRMWARE_STATUS_CMD);
#endif
if (!sendCommandToAesa(AESA_READ_FIRMWARE_STATUS_CMD))
{
fif->log(type_log_error, "Request Aesa FW versions, ERROR");
return false;
}
return true;
}
//***********************************************************************
// read versions of CTI
// Input parameters:
// Returns: true = no errors, ready for another command
// false = error, there is a problem or not responds.
//***********************************************************************
bool FlashOperationRFIF::sendCTIGetStatusCmd()
{
fif->log(type_log_info, "Request CTI status.");
grifo_fw::aesa_blob_clear(0);
grifo_fw::aesa_append_cti_read_status(0, grifo_fw::sync_immediately, CTI_READ_STATUS_TIMEOUT_MS);
#ifdef WRITE_FILE_BIN
SaveBlobToFile("sendCTIGetVersionCmd");
#endif
#ifdef MAX_LOG
fif->notify(s_status, -1,"CMD: CTI_READ_STATUS_CMD[0x%X]", CTI_READ_STATUS_CMD);
#endif
if (!sendCommandToAesa(CTI_READ_STATUS_CMD))
{
fif->log(type_log_error, "Request CTI status, ERROR");
return false;
}
return true;
}
//***********************************************************************
// Get status from Aesa RFIF
// Input parameters:
// Returns: true = no errors, ready for another command
// false = error, there is a problem or not responds.
//***********************************************************************
bool FlashOperationRFIF::getRFIFStatusCmd()
{
fif->log(type_log_info, "Request RFIF status");
grifo_fw::aesa_blob_clear(0);
grifo_fw::aesa_append_rfif_read_status(0, grifo_fw::sync_immediately, RFIF_READ_STATUS_TIMEOUT_US);
//message_count = grifo_fw::aesa_get_msg_counter();
//grifo_fw::aesa_append_rfif_read_bit_status(0, grifo_fw::sync_immediately, RFIF_READ_BIT_STATUS_TIMEOUT_US);
#ifdef MAX_LOG
fif->notify(s_status, -1,"CMD: RFIF_READ_STATUS_CMD[0x%X]", RFIF_READ_STATUS_CMD);
#endif
//send command to AESA;
if (!sendCommandToAesa(RFIF_READ_STATUS_CMD))
{
fif->log(type_log_error, "Request RFIF status, ERROR");
return false;
}
return true;
}
//***********************************************************************
// Request info from FPGA
// request all information about version, release, error, status ecc
// Input parameters:
// Returns: true if ok
// false if error
//***********************************************************************
bool FlashOperationRFIF::requestInfoFpga()
{
fif->notify(s_question, -1,"----> Get release and version about AESA components. <----");
fif->notify(s_status, -1,"----> sendCTIGetStatusCmd <----");
if (!sendCTIGetStatusCmd())
{
return false;
}
fif->notify(s_status, -1,"----> sendAESAGetVersionCmd <----");
if (!sendAESAGetVersionCmd())
{
return false;
}
fif->notify(s_status, -1,"----> sendRFIFGetVersionCmd <----");
if (!sendRFIFGetVersionCmd())
{
return false;
}
fif->notify(s_status, -1,"----> getRFIFStatusCmd <----");
if (!getRFIFStatusCmd())
{
return false;
}
return true;
}
//***********************************************************************
// is RFIF Status ok?
// Check if CFG_Busy is 0 andh CFG_Timeout_Fail is 0
// try for n times to read RFIF status
// Input parameters:
// Returns: true if ok
// false if error
//***********************************************************************
bool FlashOperationRFIF::IsRFIFStatusOK()
{
//reset counterRepeat
counterRepeat = NUM_REPEAT_RFIF_GET_STATUS;
//se è scrivibile controllo se lo stato è valido
if (lastRFIFTimeOutError)
{
fif->notify(s_error, -1,"TimeOut error in function IsFPGAflashable" );
return false;
}
//finchè la risposta è Busy, allora richiede lo stato ogni 100 us
while (lastRFIFBusy)
{
if (WAIT_TIME_BETWEEN_RFIF_GET_STATUS>0)
fif->rtgWaitEvent(WAIT_TIME_BETWEEN_RFIF_GET_STATUS);
counterRepeat--;
if (!getRFIFStatusCmd())
{
return false;
}
//se è scrivibile controllo se lo stato è valido
if (lastRFIFTimeOutError)
{
fif->notify(s_error, -1,"TimeOut error in function IsFPGAflashable" );
return false;
}
if (counterRepeat==0)
{
fif->notify(s_error, -1,"Too many times to request RFIF Status" );
return false;
}
}
return true;
}
//***********************************************************************
// is FPGA flashable?
// try to erase, write, read a unused part of fpga to test the ability to flash it.
// Input parameters:
// Returns: true if ok
// false if error
//***********************************************************************
bool FlashOperationRFIF::IsFPGAflashable()
{
fif->notify(s_question, -1,"----> Is the RFIF fpga flashable? <----");
if (!eraseTest())
return false;
if (!writeTest())
return false;
if (!readTest())
return false;
fif->notify(s_end, -1,"----> OK: the RFIF fpga is flashable! <----");
return true;
}
//***********************************************************************
// eraseTest
// try to eraseunused part of fpga to test the ability to flash it.
// Input parameters:
// Returns: true if ok
// false if error
//***********************************************************************
bool FlashOperationRFIF::eraseTest()
{
unsigned int count_try_erase = NUM_REPEAT_RFIF_ERASE;
bool isOk = false;
fif->notify(s_question, -1,"Erase address 0x%X, size 0x%X <----", RFIF_TEST_ERASE_ADDRESS, RFIF_TEST_ERASE_SIZE);
while ((count_try_erase>0) & (!isOk))
{
if (!eraseRFIFCFGMem(RFIF_TEST_ERASE_ADDRESS, RFIF_TEST_ERASE_SIZE))
{
fif->notify(s_error, -1,"ERROR in erase from 0x%0X", RFIF_TEST_ERASE_ADDRESS);
return false;
}
isOk = IsRFIFStatusOK();
if (isOk)
break;
if (WAIT_TIME_BETWEEN_RFIF_ERASE>0)
fif->rtgWaitEvent(WAIT_TIME_BETWEEN_RFIF_ERASE);
count_try_erase--;
}
if (count_try_erase==0)
{
fif->notify(s_error, -1,"ERROR: too many RFIF erase, is not flashable! <----");
return false;
}
return true;
}
//***********************************************************************
// writeTest
// try to write a unused part of fpga to test the ability to flash it.
// Input parameters:
// Returns: true if ok
// false if error
//***********************************************************************
bool FlashOperationRFIF::writeTest()
{
unsigned int num_block = RFIF_TEST_ERASE_SIZE / RFIF_TEST_WRITE_SIZE + 1;
unsigned int address_incr = RFIF_TEST_WRITE_ADDRESS;
unsigned int progress = 0;
static uint8_t ramp_buffer[RFIF_TEST_WRITE_SIZE];
memset(ramp_buffer, 0, RFIF_TEST_WRITE_SIZE);
for(unsigned int i=0; i<RFIF_TEST_WRITE_SIZE; ++i)
ramp_buffer[i]=i;
for (int i = 0; i<num_block; i++)
{
progress = 100*(float(i+1)/num_block);
if (writeRFIFCFGMem(address_incr, RFIF_TEST_WRITE_SIZE, (const char*)ramp_buffer))
{
fif->notify(s_write,
progress,"TEST RFIF FPGA: Write ramp %d/%d block from address 0x%0X, size 0x%0x.",
i,
num_block-1 ,
address_incr,
RFIF_TEST_WRITE_SIZE);
address_incr+=RFIF_TEST_WRITE_SIZE;
}
else
{
fif->notify(s_error, -1,"ERROR in write %d/%d block from 0x%X.", i, num_block-1 , address_incr);
return false;
}
if (WAIT_TIME_RFIF_WRITE_BLOCK>0)
fif->rtgWaitEvent(WAIT_TIME_RFIF_WRITE_BLOCK);
}
return true;
}
//***********************************************************************
// readTest
// try to read a unused part of fpga to test the ability to flash it.
// Input parameters:
// Returns: true if ok
// false if error
//***********************************************************************
bool FlashOperationRFIF::readTest()
{
unsigned int num_block = RFIF_TEST_ERASE_SIZE / RFIF_TEST_READ_SIZE + 1;
unsigned int address_incr = RFIF_TEST_READ_ADDRESS;
unsigned int progress = 0;
static uint8_t ramp_buffer[RFIF_TEST_READ_SIZE];
memset(ramp_buffer, 0, RFIF_TEST_READ_SIZE);
for(unsigned int i=0; i<RFIF_TEST_READ_SIZE; ++i)
ramp_buffer[i]=i;
for (int i = 0; i<num_block; i++)
{
progress = 100*(float(i+1)/num_block);
if (readRFIFCFGMem(address_incr, RFIF_TEST_READ_SIZE)) //+1 byte che contiene gli errori coding e crc
{
fif->notify(s_write,
progress,"TEST RFIF FPGA: Read %d/%d block from address 0x%0X, size 0x%0x.",
i,
num_block-1 ,
address_incr,
RFIF_TEST_WRITE_SIZE);
address_incr+=RFIF_TEST_WRITE_SIZE;
//if (resp_data.isResponseOk)
//{
unsigned int diff = 0;
if (!resp_data.isEgualToBuffer(ramp_buffer, &diff, RFIF_TEST_WRITE_SIZE))
{
fif->notify(s_error, -1,"ERROR in read %d/%d block from 0x%X, buffer read is not equal to ramp.", i, num_block-1 , address_incr);
return false;
}
/*}
else
{
fif->notify(s_error, -1,"ERROR in read %d/%d block from 0x%X, buffer read is not correct.", i, num_block-1 , address_incr);
return false;
}*/
}
else
{
fif->notify(s_error, -1,"ERROR in read %d/%d block from 0x%X.", i, num_block-1 , address_incr);
return false;
}
if (WAIT_TIME_RFIF_WRITE_BLOCK>0)
fif->rtgWaitEvent(WAIT_TIME_RFIF_WRITE_BLOCK);
}
return true;
}
bool FlashOperationRFIF::EraseSingleBlock(unsigned int address)
{
unsigned int count_try_erase = NUM_REPEAT_RFIF_ERASE;
bool isOk = false;
while ((count_try_erase>0) & (!isOk))
{
if (!eraseRFIFCFGMem(address, RFIF_ERASE_SINGLE_BLOCK_SIZE))
{
fif->notify(s_error, -1,"----> ERROR: the RFIF fpga is not erasable <----");
return false;
}
isOk = IsRFIFStatusOK();
if (isOk)
break;
if (WAIT_TIME_BETWEEN_RFIF_ERASE>0)
fif->rtgWaitEvent(WAIT_TIME_BETWEEN_RFIF_ERASE);
count_try_erase--;
}
if (count_try_erase==0)
{
fif->notify(s_error, -1,"----> ERROR: too many RFIF erase, is not erasable! <----");
return false;
}
fif->notify(s_end, -1,"----> OK: the RFIF fpga single block is clean! <----");
return true;
}
//***********************************************************************
// is FPGA flashable?
// try to erase a unused part of fpga to test the ability to flash it.
// Input parameters:
// Returns: true if ok
// false if error
//***********************************************************************
bool FlashOperationRFIF::EraseAllRFIFFpga(unsigned int address, unsigned int size)
{
unsigned int num_block = size / RFIF_ERASE_SINGLE_BLOCK_SIZE + 1;
unsigned int address_incr = address;
unsigned int progress = 0;
for (int i = 0; i<num_block; i++)
{
progress = 100*(float(i+1)/num_block);
if (EraseSingleBlock(address_incr))
{
fif->notify(s_erase,
progress,"Erase %d/%d block from address 0x%0X, size 0x%0x",
i,
num_block-1 ,
address_incr,
RFIF_ERASE_SINGLE_BLOCK_SIZE);
address_incr+=RFIF_ERASE_SINGLE_BLOCK_SIZE;
}
else
{
fif->notify(s_error, -1,"ERROR in erase %d/%d block from 0x%X", i, num_block-1 , address_incr);
return false;
}
if (WAIT_TIME_RFIF_ERASE_BLOCK>0)
fif->rtgWaitEvent(WAIT_TIME_RFIF_ERASE_BLOCK);
}
return true;
}
//***********************************************************************
// Program FLASH with data buffer
// Input parameters: start_address = start address to write
// data = buffer to write on flash
// size = dimension of data buffer
// Returns: true if ok
// false if error
//***********************************************************************
bool FlashOperationRFIF::writeAllRFIFFpga(unsigned int start_address, const void* data, unsigned int size)
{
unsigned int num_block = size / RFIF_TEST_WRITE_SIZE + 1;
unsigned int address_incr = start_address;
unsigned int progress = 0;
unsigned int size_to_write = RFIF_TEST_WRITE_SIZE;
for (int i = 0; i<num_block; i++)
{
progress = 100*(float(i+1)/num_block);
if (i==num_block-1)
size_to_write = size-(i*RFIF_TEST_WRITE_SIZE);
if (writeRFIFCFGMem(address_incr,
size_to_write,
&((const char*)data)[i*RFIF_TEST_WRITE_SIZE]))
{
fif->notify(s_write,
progress,"Write %d/%d block from address 0x%0X, size 0x%0x.",
i,
num_block-1 ,
address_incr,
size_to_write);
address_incr+=RFIF_TEST_WRITE_SIZE;
}
else
{
fif->notify(s_error, -1,"ERROR in write %d/%d block from 0x%X.", i, num_block-1 , address_incr);
return false;
}
if (WAIT_TIME_RFIF_WRITE_BLOCK>0)
fif->rtgWaitEvent(WAIT_TIME_RFIF_WRITE_BLOCK);
}
return true;
}
//***********************************************************************
// readAllRFIFFpga
// Input parameters: start_address = start address to read
// data = buffer to write on flash
// size = dimension of data buffer
// Returns: true if ok
// false if error
//***********************************************************************
bool FlashOperationRFIF::readAllRFIFFpga(unsigned int start_address, const void* data, unsigned int size)
{
unsigned int num_block = size / RFIF_TEST_READ_SIZE + 1;
unsigned int address_incr = start_address;
unsigned int progress = 0;
unsigned int size_to_read = RFIF_TEST_READ_SIZE;
for (int i = 0; i<num_block; i++)
{
progress = 100*(float(i+1)/num_block);
if (i==num_block-1)
size_to_read = size-(i*RFIF_TEST_READ_SIZE)-1;
if (readRFIFCFGMem(address_incr, size_to_read)) //+1 byte che contiene gli errori coding e crc
{
fif->notify(s_write,
progress,"Read %d/%d block from address 0x%0X, size 0x%0x.",
i,
num_block-1 ,
address_incr,
size_to_read);
address_incr+=RFIF_TEST_READ_SIZE;
unsigned int diff = 0;
if (!resp_data.isEgualToBuffer(&((uint8_t*)data)[i*RFIF_TEST_READ_SIZE], &diff, size_to_read))
{
fif->notify(s_error, -1,"ERROR in read %d/%d block from 0x%X, buffer read is not equal to file selected.", i, num_block-1 , address_incr);
fif->notify(s_error, -1,"at value 0x%0x read %d - file %d",diff+i*RFIF_TEST_READ_SIZE, ((uint8_t*)data)[i*RFIF_TEST_READ_SIZE+diff] , resp_data.resp_buffer[diff]);
return false;
}
}
else
{
fif->notify(s_error, -1,"ERROR in read %d/%d block from 0x%X.", i, num_block-1 , address_incr);
return false;
}
if (WAIT_TIME_RFIF_READ_BLOCK>0)
fif->rtgWaitEvent(WAIT_TIME_RFIF_READ_BLOCK);
}
return true;
}
//***********************************************************************
// Program FLASH with data buffer
// Input parameters: data = buffer to write on flash
// size = dimension of data buffer
// Returns: true if ok
// false if error
//***********************************************************************
bool FlashOperationRFIF::program(const void* data, unsigned int size)
{
lastRFIFBusy = false;
lastRFIFTimeOutError = false;
unsigned int FPGA_START_ADDRESS = 0;
unsigned int FPGA_SIZE = 0;
//reset counterRepeat
counterRepeat = NUM_REPEAT_RFIF_GET_STATUS;
if (!requestInfoFpga())
return false;
//controllo se la flash è scrivibile
if (!IsFPGAflashable())
{
//non è scrivibile e quindi ritorno errore e concludo
return false;
}
//individuo i parametri di indirizzo e dimensione per il flash della FPGA
switch (profile.spiport)
{
case primarySpiPort:
FPGA_START_ADDRESS = RFIF_GOLDEN_ADDRESS;
FPGA_SIZE = RFIF_GOLDEN_UPDATE_SIZE;
break;
case secondarySpiPort:
FPGA_START_ADDRESS = RFIF_UPDATE_ADDRESS;
FPGA_SIZE = RFIF_GOLDEN_UPDATE_SIZE;
break;
default:
break;
}
//faccio l'erase della parte dell'FPGA che devo scrivere
if (!EraseAllRFIFFpga(FPGA_START_ADDRESS, FPGA_SIZE))
{
//non riesco a fare l'erase dell'fpga
return false;
}
//scrivo su fpga il buffer data (che contiene il software da scrivere)
if (!writeAllRFIFFpga(FPGA_START_ADDRESS, data, size))
{
//non riesco a scrivere sulla flash
return false;
}
//verifico su fpga se quanto scritto corrisponde al buffer data scritto in precedenza
if (!readAllRFIFFpga(FPGA_START_ADDRESS, data, size))
{
//non riesco a leggere dalla flash
return false;
}
return true;
}
/*
*
* static uint8_t dummy_buffer[RFIF_TEST_WRITE_SIZE];
memset(dummy_buffer, 0, RFIF_TEST_WRITE_SIZE);
for(unsigned int i=0; i<sizeof dummy_buffer; ++i)
dummy_buffer[i]=i;*/
/*fif->notify(s_status, -1,"----> writeRFIFCFGMem address 0x%X, size %d <----", RFIF_TEST_WRITE_ADDRESS, RFIF_TEST_WRITE_SIZE);
/*if (!writeRFIFCFGMem(RFIF_TEST_ERASE_ADDRESS, dim_buffer, (const char*)dummy_buffer))
//if (!writeRFIFCFGMem(RFIF_TEST_ERASE_ADDRESS, size, (const char*)data))
{
return false;
}*/
/*fif->notify(s_status, -1,"----> readRFIFCFGMem address 0x%X, size %d <----", RFIF_TEST_READ_ADDRESS, RFIF_TEST_READ_SIZE);
if (!readRFIFCFGMem(RFIF_TEST_ERASE_ADDRESS, RFIF_TEST_READ_SIZE))
{
return false;
}*/
/*fif->notify(s_status, -1,"----> writeRampRFIFCFGMem address 0x%X, size %d <----", RFIF_TEST_ERASE_ADDRESS, RFIF_TEST_ERASE_SIZE);
//if (!writeRampRFIFCFGMem(RFIF_TEST_ERASE_ADDRESS, RFIF_TEST_ERASE_SIZE))
if (!writeRampRFIFCFGMem(RFIF_TEST_ERASE_ADDRESS, RFIF_TEST_ERASE_SIZE))
{
return false;
}*/
/*fif->notify(s_status, -1,"----> eraseRFIFCFGMem address 0x%X, size %d <----", RFIF_TEST_ERASE_ADDRESS, RFIF_TEST_ERASE_SIZE);
if (!eraseRFIFCFGMem(RFIF_TEST_ERASE_ADDRESS, RFIF_TEST_ERASE_SIZE))
{
return false;
}*/
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