SXXXXXXX_PyDownloadFwViaSRIO/_OLD/Vecchia_app/FpgaBeamMeUp/targets - Copia (3).ini
2026-01-22 17:10:05 +01:00

280 lines
3.8 KiB
INI

[default]
port=50069
ip="192.168.2.102"
smart=1
section=APP1
srio_base=$0x500000
fpga_base=$0x0
fpga_sector=0x010000
defTarget=DFE/FPGA2_U_P
[TGT-0]
appName=EIF/FPGA1_G_P
description="Golden"
slotAddress=$0x13
arch=Xilinx
name=EIF/FPGA1_G_P
section=
filePrefix=FPGA-
addressStartArea=0x00000000
addressStopArea=0x007FFFFF
area=0
type=0
3_4Byte=0
spiPort=0
numSector=128
[TGT-1]
appName=EIF/FPGA1_G_S
description="Golden"
slotAddress=$0x13
arch=Xilinx
name=EIF/FPGA1_G_S
section=
filePrefix=FPGA-
addressStartArea=0x00000000
addressStopArea=0x007FFFFF
area=0
type=0
3_4Byte=0
spiPort=1
numSector=128
[TGT-2]
appName=EIF/FPGA1_U_P
description="User"
slotAddress=$0x13
arch=Xilinx
name=EIF/FPGA1_U_P
section=
filePrefix=FPGA-
addressStartArea=0x00800000
addressStopArea=0x00FFFFFF
area=1
type=0
3_4Byte=0
spiPort=0
numSector=128
[TGT-3]
appName=EIF/FPGA1_U_S
description="User"
slotAddress=$0x13
arch=Xilinx
name=EIF/FPGA1_U_S
section=
filePrefix=FPGA-
addressStartArea=0x00800000
addressStopArea=0x00FFFFFF
area=1
type=0
3_4Byte=0
spiPort=1
numSector=128
[TGT-4]
appName=EIF/FPGA2_G_P
description="Golden"
slotAddress=$0x73
arch=Xilinx
name=EIF/FPGA1_Golden_S
section=
filePrefix=FPGA-
addressStartArea=0x00000000
addressStopArea=0x007FFFFF
area=0
type=0
3_4Byte=0
spiPort=0
numSector=128
[TGT-5]
appName=EIF/FPGA2_G_S
description="Golden"
slotAddress=$0x73
arch=Xilinx
name=EIF/FPGA1_Golden_S
section=
filePrefix=FPGA-
addressStartArea=0x00000000
addressStopArea=0x007FFFFF
area=0
type=0
3_4Byte=0
spiPort=1
numSector=128
[TGT-6]
appName=EIF/FPGA2_U_P
description="User"
slotAddress=$0x73
arch=Xilinx
name=EIF/FPGA1_User_P
section=
filePrefix=FPGA-
addressStartArea=0x00800000
addressStopArea=0x00FFFFFF
area=1
type=0
3_4Byte=0
spiPort=0
numSector=128
[TGT-7]
appName=EIF/FPGA2_U_S
description="User"
slotAddress=$0x73
arch=Xilinx
name=EIF/FPGA1_User_S
section=
filePrefix=FPGA-
addressStartArea=0x00800000
addressStopArea=0x00FFFFFF
area=1
type=0
3_4Byte=0
spiPort=1
numSector=128
[TGT-8]
appName=DFE/FPGA1_G_P
description="Golden"
slotAddress=$0x16
arch=Xilinx
name=DFE/FPGA1_G_P
section=
filePrefix=FPGA-
addressStartArea=0x00000000
addressStopArea=0x007FFFFF
area=0
type=1
3_4Byte=1
spiPort=0
numSector=256
[TGT-9]
appName=DFE/FPGA1_G_S
description="Golden"
slotAddress=$0x16
arch=Xilinx
name=DFE/FPGA1_G_S
section=
filePrefix=FPGA-
addressStartArea=0x00000000
addressStopArea=0x007FFFFF
area=0
type=1
3_4Byte=1
spiPort=1
numSector=256
[TGT-10]
appName=DFE/FPGA1_U_P
description="User"
slotAddress=$0x16
arch=Xilinx
name=DFE/FPGA1_U_P
section=
filePrefix=FPGA-
addressStartArea=0x00800000
addressStopArea=0x00FFFFFF
area=1
type=1
3_4Byte=1
spiPort=0
numSector=256
[TGT-11]
appName=DFE/FPGA1_U_S
description="User"
slotAddress=$0x16
arch=Xilinx
name=DFE/FPGA1_U_S
section=
filePrefix=FPGA-
addressStartArea=0x00800000
addressStopArea=0x00FFFFFF
area=1
type=1
3_4Byte=1
spiPort=1
numSector=256
[TGT-12]
appName=DFE/FPGA2_G_P
description="Golden"
slotAddress=$0x76
arch=Xilinx
name=DFE/FPGA1_Golden_S
section=
filePrefix=FPGA-
addressStartArea=0x00000000
addressStopArea=0x007FFFFF
area=0
type=1
3_4Byte=1
spiPort=0
numSector=256
[TGT-13]
appName=DFE/FPGA2_G_S
description="Golden"
slotAddress=$0x76
arch=Xilinx
name=DFE/FPGA1_Golden_S
section=
filePrefix=FPGA-
addressStartArea=0x00000000
addressStopArea=0x007FFFFF
area=0
type=1
3_4Byte=1
spiPort=1
numSector=256
[TGT-14]
appName=DFE/FPGA2_U_P
description="User"
slotAddress=$0x76
arch=Xilinx
name=DFE/FPGA1_User_P
section=
filePrefix=FPGA-
addressStartArea=0x00800000
addressStopArea=0x00FFFFFF
area=1
type=1
3_4Byte=1
spiPort=0
numSector=256
[TGT-15]
appName=DFE/FPGA2_U_S
description="User"
slotAddress=$0x76
arch=Xilinx
name=DFE/FPGA1_User_S
section=
filePrefix=FPGA-
addressStartArea=0x00800000
addressStopArea=0x00FFFFFF
area=1
type=1
3_4Byte=1
spiPort=1
numSector=256