SXXXXXXX_PyDownloadFwViaSRIO/_OLD/Vecchia_app/FpgaBeamMeUp/targets - Copia.ini
2026-01-22 17:10:05 +01:00

169 lines
2.4 KiB
INI

[default]
port=50069
ip="192.168.2.102"
smart=1
section=APP1
srio_base=$0x500000
fpga_base=$0x0
fpga_sector=0x010000
defTarget=EIF/FPGA1_U
[TGT-0]
appName=EIF/FPGA0_G
description="Golden"
slotAddress=$0x13
arch=Xilinx
name=EIF/FPGA0_Golden
section=
filePrefix=FPGA-
addressStartArea=0x00000000
addressStopArea=0x007FFFFF
area=0
type=0
3_4Byte=0
spiPort=0
numSector=128
[TGT-1]
appName=EIF/FPGA0_U
description="User"
slotAddress=$0x13
arch=Xilinx
name=EIF/FPGA0_User
section=
filePrefix=FPGA-
addressStartArea=0x00800000
addressStopArea=0x00FFFFFF
area=1
type=0
3_4Byte=0
spiPort=0
numSector=128
[TGT-2]
appName=EIF/FPGA1_G
description="Golden"
slotAddress=$0x73
arch=Xilinx
name=EIF/FPGA1_Golden
section=
filePrefix=FPGA-
addressStartArea=0x00000000
addressStopArea=0x007FFFFF
area=0
type=0
3_4Byte=0
spiPort=1
numSector=128
[TGT-3]
appName=EIF/FPGA1_U
description="User"
slotAddress=$0x73
arch=Xilinx
name=EIF/FPGA1_User
section=
filePrefix=FPGA-
addressStartArea=0x00800000
addressStopArea=0x00FFFFFF
area=1
type=0
3_4Byte=0
spiPort=1
numSector=128
[TGT-4]
appName=XIF1/FPGA0_G
description="Golden"
slotAddress=$0x14
arch=Xilinx
name=XIF1/FPGA0_Golden
section=
filePrefix=FPGA-
addressStartArea=0x00000000
addressStopArea=0x00FFFFFF
area=0
type=1
3_4Byte=1
spiPort=0
numSector=256
[TGT-5]
appName=XIF1/FPGA0_U
description="User"
slotAddress=$0x14
arch=Xilinx
name=XIF1/FPGA0_User
section=
filePrefix=FPGA-
addressStartArea=0x01000000
addressStopArea=0x01FFFFFF
area=1
type=1
3_4Byte=1
spiPort=0
numSector=256
[TGT-6]
appName=XIF2/FPGA1_G
description="Golden"
slotAddress=$0x74
arch=Xilinx
name=XIF2/FPGA1_Golden
section=
filePrefix=FPGA-
addressStartArea=0x00000000
addressStopArea=0x00FFFFFF
area=0
type=1
3_4Byte=1
spiPort=1
numSector=256
[TGT-7]
appName=XIF2/FPGA1_U
description="User"
slotAddress=$0x74
arch=Xilinx
name=XIF2/FPGA1_User
section=
filePrefix=FPGA-
addressStartArea=0x01000000
addressStopArea=0x01FFFFFF
area=1
type=1
3_4Byte=1
spiPort=1
numSector=256
[TGT-8]
appName=DC_G
description="Golden"
slotAddress=$0x15
arch=Xilinx
name=DC_Golden
section=
filePrefix=FPGA-
addressStartArea=0x01000000
addressStopArea=0x01FFFFFF
area=0
type=1
3_4Byte=1
spiPort=0
numSector=256
[TGT-9]
appName=DC_U
description="User"
slotAddress=$0x15
arch=Xilinx
name=DC_User
section=
filePrefix=FPGA-
addressStartArea=0x01000000
addressStopArea=0x01FFFFFF
area=1
type=1
3_4Byte=1
spiPort=0
numSector=256