169 lines
2.4 KiB
INI
169 lines
2.4 KiB
INI
[default]
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port=50069
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ip="192.168.2.102"
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smart=1
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section=APP1
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srio_base=$0x500000
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fpga_base=$0x0
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fpga_sector=0x010000
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defTarget=EIF/FPGA1_U
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[TGT-0]
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appName=EIF/FPGA0_G
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description="Golden"
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slotAddress=$0x13
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arch=Xilinx
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name=EIF/FPGA0_Golden
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section=
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filePrefix=FPGA-
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addressStartArea=0x00000000
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addressStopArea=0x007FFFFF
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area=0
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type=0
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3_4Byte=0
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spiPort=0
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numSector=128
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[TGT-1]
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appName=EIF/FPGA0_U
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description="User"
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slotAddress=$0x13
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arch=Xilinx
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name=EIF/FPGA0_User
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section=
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filePrefix=FPGA-
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addressStartArea=0x00800000
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addressStopArea=0x00FFFFFF
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area=1
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type=0
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3_4Byte=0
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spiPort=0
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numSector=128
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[TGT-2]
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appName=EIF/FPGA1_G
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description="Golden"
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slotAddress=$0x73
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arch=Xilinx
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name=EIF/FPGA1_Golden
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section=
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filePrefix=FPGA-
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addressStartArea=0x00000000
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addressStopArea=0x007FFFFF
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area=0
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type=0
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3_4Byte=0
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spiPort=1
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numSector=128
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[TGT-3]
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appName=EIF/FPGA1_U
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description="User"
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slotAddress=$0x73
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arch=Xilinx
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name=EIF/FPGA1_User
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section=
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filePrefix=FPGA-
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addressStartArea=0x00800000
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addressStopArea=0x00FFFFFF
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area=1
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type=0
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3_4Byte=0
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spiPort=1
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numSector=128
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[TGT-4]
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appName=XIF1/FPGA0_G
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description="Golden"
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slotAddress=$0x14
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arch=Xilinx
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name=XIF1/FPGA0_Golden
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section=
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filePrefix=FPGA-
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addressStartArea=0x00000000
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addressStopArea=0x00FFFFFF
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area=0
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type=1
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3_4Byte=1
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spiPort=0
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numSector=256
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[TGT-5]
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appName=XIF1/FPGA0_U
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description="User"
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slotAddress=$0x14
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arch=Xilinx
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name=XIF1/FPGA0_User
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section=
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filePrefix=FPGA-
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addressStartArea=0x01000000
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addressStopArea=0x01FFFFFF
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area=1
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type=1
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3_4Byte=1
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spiPort=0
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numSector=256
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[TGT-6]
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appName=XIF2/FPGA1_G
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description="Golden"
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slotAddress=$0x74
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arch=Xilinx
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name=XIF2/FPGA1_Golden
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section=
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filePrefix=FPGA-
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addressStartArea=0x00000000
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addressStopArea=0x00FFFFFF
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area=0
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type=1
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3_4Byte=1
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spiPort=1
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numSector=256
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[TGT-7]
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appName=XIF2/FPGA1_U
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description="User"
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slotAddress=$0x74
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arch=Xilinx
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name=XIF2/FPGA1_User
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section=
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filePrefix=FPGA-
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addressStartArea=0x01000000
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addressStopArea=0x01FFFFFF
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area=1
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type=1
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3_4Byte=1
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spiPort=1
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numSector=256
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[TGT-8]
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appName=DC_G
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description="Golden"
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slotAddress=$0x15
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arch=Xilinx
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name=DC_Golden
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section=
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filePrefix=FPGA-
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addressStartArea=0x01000000
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addressStopArea=0x01FFFFFF
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area=0
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type=1
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3_4Byte=1
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spiPort=0
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numSector=256
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[TGT-9]
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appName=DC_U
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description="User"
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slotAddress=$0x15
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arch=Xilinx
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name=DC_User
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section=
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filePrefix=FPGA-
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addressStartArea=0x01000000
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addressStopArea=0x01FFFFFF
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area=1
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type=1
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3_4Byte=1
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spiPort=0
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numSector=256 |