//!;;Rpy::+
//!;;Rpy::ModelElement: iddtypes::idd_status_types
//!;;Rpy::
//!;;Rpy::Component: IDDComponent 
//!;;Rpy::Configuration: IDDConfig
//!;;Rpy::Project: IDD
//!;;Rpy::
//!;;Rpy::FilePath: idd_status_types.h
//!;;Rpy::Tag: $Tag
//!;;Rpy::
//!;;Rpy::Copyright: Leonardocompany - COMPANY RESTRICTED
//!;;Rpy::
//!;;Rpy::Generated by Rhapsody: 7.5.3 
//!;;Rpy::-


#ifndef idd_status_types_H
#define idd_status_types_H

//## auto_generated
#include "iddtypes.h"
//## dependency idd_base_types
#include "idd_base_types.h"
//## dependency idd_mode_types
#include "idd_mode_types.h"
//## dependency waveform_t
#include "idd_waveform_types.h"
namespace iddtypes
{
    //## package iddtypes::idd_status_types
    
    
    //#[ type op_antenna_state_t
    enum op_antenna_state_t CPP_ENUM_BASE(int)   //Antenna state, maybe not applicable in case of AESA errors
    {
        aos_null=0,     
        aos_ready=1,    //Antenna ready to accept positioning and radiaiton command - required for minimal (fast) power-up
        
        aos_initializing, //Antenna initializaiton in progress
        aos_init_error    //Antenna initializaiton error
    };
    //#]
    
    //#[ type op_health_status_t
    enum op_health_status_t CPP_ENUM_BASE(int)   //Operative detectable fail (CBIT), maybe need STBY or IBIT for correct detection
    {
        hs_all_ok=0,
        
        hs_core_fpga_if_fail=(1<<1),    //errors communicating with core DFE fpga (mainly SRIO fail?)
        hs_batch_fail=(1<<2),    //batch missing
        hs_comm_if_fail=(1<<3), //Some main communicaiton I/F fail (SRIO?)
        hs_mode_fail=(1<<4),    //any SW problem executing the mode (SW errors?)
        
        hs_dc_if_fail=(1<<8),         //Any Down converter I/F fail (down converter control link)
        hs_dc1_fail=(1<<9),            //DC1Any DC fail (but I/F fails)
        hs_dc2_fail=(1<<10),            //Any DC fail (but I/F fails)
        hs_dc3_fail=(1<<11),            //Any DC fail (but I/F fails)
        hs_dc_fail=hs_dc1_fail|hs_dc2_fail|hs_dc3_fail, //All DC in fail or operative localizaton not possible
        
        hs_excsynth_if_fail=(1<<16),   //Any Exctier or Syhtn I/F fail
        hs_exciter_fail=(1<<17),     //Exctier Fail
        hs_synth_fail=(1<<18),     //Synth Fail
        hs_extsynth_fail=hs_exciter_fail|hs_synth_fail, //All fails or localization not possible
        
        hs_aesa_if_fail=(1<<24),    //AESA I/F fail (commuications)
        hs_aesa_fail=(1<<25),
        hs_aesa_rfif_fail=(1<<26),
        hs_aesa_all_fail=hs_aesa_fail|hs_aesa_rfif_fail  //communicaiton ok but fail detetcted on all units or localization not possibile    
    };
    //#]
    
    //#[ type mode_status_t
    struct mode_status_t
    {
        master_mode_t mode;		//## attribute mode
        sub_mode_t sub_mode;		//## attribute sub_mode
        range_scale_t range_scale;		//## attribute range_scale
        
        boolean stby;		//## attribute stby
        boolean radiate;		//## attribute radiate
        boolean freeze;		//## attribute freeze
        boolean expand;		//## attribute expand
                         
        waveform_t  waveform;   //current waveform (this is not the command tellback)
            
        op_health_status_t health_status;
        op_antenna_state_t antenna_state;                         
        
        uint32_t op_state; //so far a place holder, info about the internal CDP state
        
        boolean wow;
        boolean ant_radiate;
        
        uint32_t aesa_quick_status; //bitmaks, see aesa_report.h:AesaErrorEnum
        
        uint32_t ms_spare_[1];
    };
    //#]
}

#endif
//;;Rpy:: end


