158 lines
4.1 KiB
JSON
158 lines
4.1 KiB
JSON
{
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"global_config": {
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"ip": "192.168.2.102",
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"port": 50069,
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"srio_base": 5242880,
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"fpga_base": 0,
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"fpga_sector": 65536,
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"smart": 1,
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"section": "APP1",
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"default_target": "EIF_FPGA1",
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"verify_after_write": true,
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"max_tftp_retries": 3,
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"max_register_retries": 10,
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"max_chunk_write_retries": 3
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},
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"models": {
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"0": {
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"id_model": 0,
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"model": "xcku040",
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"description": "128Mbit xcku040",
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"flash_type": 0,
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"is_4byte_addressing": false,
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"num_sectors": 256,
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"golden_start": 0,
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"golden_stop": 8388607,
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"user_start": 8388608,
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"user_stop": 16777215,
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"test_address": null
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},
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"1": {
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"id_model": 1,
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"model": "xcku060",
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"description": "128Mbit xcku060",
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"flash_type": 1,
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"is_4byte_addressing": true,
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"num_sectors": 512,
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"golden_start": 0,
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"golden_stop": 16777215,
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"user_start": 16777216,
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"user_stop": 33554431,
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"test_address": null
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},
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"2": {
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"id_model": 2,
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"model": "rfif",
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"description": "256Mbit",
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"flash_type": 1,
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"is_4byte_addressing": true,
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"num_sectors": 512,
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"golden_start": 0,
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"golden_stop": 4194303,
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"user_start": 4194304,
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"user_stop": 8388607,
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"test_address": 32505856
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}
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},
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"targets": {
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"EIF_FPGA1": {
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"id_target": "EIF_FPGA1",
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"description": "EIF FPGA1 0x13",
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"slot_address": 19,
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"architecture": "Xilinx",
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"name": "EIF_FPGA1",
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"file_prefix": "EIF_FPGA1",
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"id_model": 0,
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"golden_binary_path": null,
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"user_binary_path": null
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},
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"EIF_FPGA2": {
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"id_target": "EIF_FPGA2",
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"description": "EIF FPGA2 0x73",
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"slot_address": 115,
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"architecture": "Xilinx",
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"name": "EIF_FPGA2",
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"file_prefix": "EIF_FPGA2",
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"id_model": 0,
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"golden_binary_path": null,
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"user_binary_path": null
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},
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"XIF1_FPGA1": {
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"id_target": "XIF1_FPGA1",
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"description": "XIF1/FPGA1 0x14",
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"slot_address": 20,
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"architecture": "Xilinx",
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"name": "XIF1_FPGA1",
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"file_prefix": "XIF1_FPGA1",
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"id_model": 0,
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"golden_binary_path": null,
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"user_binary_path": null
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},
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"XIF1_FPGA2": {
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"id_target": "XIF1_FPGA2",
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"description": "XIF1/FPGA2 0x74",
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"slot_address": 116,
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"architecture": "Xilinx",
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"name": "XIF1_FPGA2",
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"file_prefix": "XIF1_FPGA2",
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"id_model": 0,
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"golden_binary_path": null,
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"user_binary_path": null
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},
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"XIF2_FPGA1": {
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"id_target": "XIF2_FPGA1",
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"description": "XIF2/FPGA1 0x15",
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"slot_address": 21,
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"architecture": "Xilinx",
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"name": "XIF2_FPGA1",
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"file_prefix": "XIF2_FPGA1",
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"id_model": 0,
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"golden_binary_path": null,
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"user_binary_path": null
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},
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"XIF2_FPGA2": {
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"id_target": "XIF2_FPGA2",
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"description": "XIF2/FPGA2 0x75",
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"slot_address": 117,
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"architecture": "Xilinx",
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"name": "XIF2_FPGA2",
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"file_prefix": "XIF2_FPGA2",
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"id_model": 0,
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"golden_binary_path": null,
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"user_binary_path": null
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},
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"DFE_FPGA1": {
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"id_target": "DFE_FPGA1",
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"description": "DFE/FPGA1 0x16",
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"slot_address": 22,
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"architecture": "Xilinx",
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"name": "DFE_FPGA1",
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"file_prefix": "DFE_FPGA1",
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"id_model": 1,
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"golden_binary_path": "C:/src/____GitProjects/SXXXXXXX_PyDownloadFwViaSRIO/test_firmware.bin",
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"user_binary_path": null
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},
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"DFE_FPGA2": {
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"id_target": "DFE_FPGA2",
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"description": "DFE/FPGA2 0x76",
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"slot_address": 118,
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"architecture": "Xilinx",
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"name": "DFE_FPGA2",
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"file_prefix": "DFE_FPGA2",
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"id_model": 0,
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"golden_binary_path": null,
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"user_binary_path": null
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},
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"AESA_RFIF": {
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"id_target": "AESA_RFIF",
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"description": "AESA/RFIF 0x16",
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"slot_address": 22,
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"architecture": "RFIF",
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"name": "AESA_RFIF",
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"file_prefix": "AESA_RFIF",
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"id_model": 2,
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"golden_binary_path": null,
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"user_binary_path": null
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}
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}
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} |