192 lines
6.3 KiB
C++
192 lines
6.3 KiB
C++
/*
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* fpgaflashconfig.h
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*
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*
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* author: Luca Vallongo
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*
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*/
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#ifndef FPGAFLASHCONFIG_H
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#define FPGAFLASHCONFIG_H
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//TEST PARAMETERS
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//#define NUM_BLOCKS_ERASE 2
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//#define DIM_FILE_WRITE 131072
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//number of flash present into system
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#define NUM_FLASH 10
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//number of Counter repeat before reset
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#define MAX_COUNTER_REPEAT 10
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//Software Reset Register (SRR)
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#define SRR_KEYCODE 0x12ABCDEF
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//timeout for spi comunication
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#define TIMEOUT_SPI 2000
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#define TIMEOUT_RFIF_ESPONSE 2000
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#define WAIT_TIME_AFTER_WR 0 //wait after write
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#define WAIT_TIME_BEFORE_RD 5 //wait before read ATTENZIONE NON USATO
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#define WAIT_TIME_AFTER_RD 0 //wait after read ATTENZIONE INCIDE TANTO SULLE PRESTAZIONI
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#define WAIT_TIME_BEFORE_NEW_RD 5 //wait before new read, in case of repeat read
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#define WAIT_TIME_BETWEEN_2_OP 0 //wait between two basic operation
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#define WAIT_TIME_BETWEEN_2_MACRO 0 //wait between two macro operation(for example, between erase and confirm)
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#define WAIT_TIME_INIT_OPERATION 100 //wait for reset, read flash id, set SQPI
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/*#define WAIT_TIME_AFTER_WR 0 //wait after write
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#define WAIT_TIME_BEFORE_RD 5 //wait before read
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#define WAIT_TIME_AFTER_RD 0 //wait after read
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#define WAIT_TIME_BEFORE_NEW_RD 5 //wait before new read, in case of repeat read
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#define WAIT_TIME_BETWEEN_2_OP 0 //wait between two basic operation
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#define WAIT_TIME_BETWEEN_2_MACRO 0 //wait between two macro operation(for example, between erase and confirm)
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#define WAIT_TIME_INIT_OPERATION 100 //wait for reset, read flash id, set SQPI*/
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//RFIF
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#define WAIT_TIME_BEFORE_REQUEST_RESPONSE 1000
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#define WAIT_TIME_BETWEEN_RFIF_GET_STATUS 5000 //wait for repeat rfif gets status
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#define WAIT_TIME_BETWEEN_RFIF_ERASE 3000 //wait for repeat rfif erase
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#define WAIT_TIME_RFIF_ERASE_BLOCK 10 //wait for repeat rfif erase block
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#define WAIT_TIME_RFIF_WRITE_BLOCK 1 //wait for repeat rfif write
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#define WAIT_TIME_RFIF_READ_BLOCK 1 //wait for repeat rfif read
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#define NUM_REPEAT_RFIF_GET_STATUS 3 //number of repeat get rfif status
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#define NUM_REPEAT_RFIF_ERASE 4 //number of repeat rfif erase
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#define NUM_REPEAT_RFIF_WRITE 5 //number of repeat rfif erase
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#define NUM_REPEAT_RFIF_READ 6 //number of repeat rfif erase
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#define NUM_REPEAT_READ 3 //number of repeat to read on tftp before error on tftp
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#define NUM_REPEAT_WRITE 3 //number of repeat to read on tftp before error on tftp
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//base address for interface
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#define BASE_ADDRESS_IF 0x47000000
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//base address for ddr memory for test
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#define BASE_ADDRESS_MEM 0xA0000000
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//if define NO_WRITE_ERASE, the app doesn't erase and write the flash
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//#define NO_WRITE_ERASE //comment this line for enable write/erase flash memory
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// FPGA(s)
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#define I2C_FPGA1_ADD 0x60
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#define I2C_FPGA2_ADD 0x61
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#define FPGA_C_MEM_SLOT_ADD 0x44000000 // Carrier
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#define FPGA_C_MEM_WR_ADD 0x44000780 // Carrier
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#define FPGA_C_MEM_RD_ADD 0x44000800 // Carrier
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#define FPGA_Z_MEM_SLOT_ADD 0x500E0000 // ZYNQ
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#define FPGA_Z_MEM_WR_ADD 0x500E0780 // ZYNQ
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#define FPGA_Z_MEM_RD_ADD 0x500E0800 // ZYNQ
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#define FPGA_FW_PAGE_SIZE 256 // Page size for firmware download [bytes]
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#define FLASH_SECTOR_DIM 64 //kbytes, dimension of one sector of the flash
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#define FLASH_128Mbit 128
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#define FLASH_256Mbit 256
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#define DIM_DATA_BUFFER FPGA_FW_PAGE_SIZE
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#include <grifo_fw_map.h>
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//RFIF FPGA
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#define AESA_TX_SIZE_DEF grifo_fw::AESA_TX_SIZE
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#define AESA_RX_SIZE_DEF grifo_fw::AESA_RX_SIZE
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#define AESA_TX_ADDRESS grifo_fw::AESA_TX_A
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#define AESA_RX_ADDRESS grifo_fw::AESA_RX_A
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#define FPGA_SRIO_NODE_ID_AESA grifo_fw::FPGA_SRIO_NODE_ID
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#define DSP_ETHERNET_IP "192.168.2.101"
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#include <QTreeWidgetItem>
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//3 types of flash, different characteristics
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enum flash_type_t
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{
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flash_type_xcku040,
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flash_type_xcku060,
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flash_type_xc7a200,
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flash_type_rfif
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};
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//two different flash area
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enum flash_firmware_area_t
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{
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flash_firmware_area_golden, //not writeable without confirm
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flash_firmware_area_user //usualy writeable area
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};
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/*
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class TgtMatch
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{
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public:
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QString appName;
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QString slotAddress;
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QString archName;
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QString description;
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QString tgtName;
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QString partName;
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QString matchStr;
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QString address_start_area; //hex address, start fimware area
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QString address_stop_area; //hex address, stop fimware area
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flash_firmware_area_t firmware_area; //golden/user FW
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flash_type_t type; //xcku040, xcku060, xc7a200
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reg_moder_byteaddress_t byteaddress ; //3/4 byte address
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reg_moder_qspiport_t spiPort; //use primary/secondary SPI interface port
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QString tgtSection; //target section into config file
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QString ip;
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unsigned int port;
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QRegExp rexp;
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QTreeWidgetItem* wi;
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};
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class TgtMatchSet
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{
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public:
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QList<TgtMatch> db;
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TgtMatch* add(
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const QString& aName,
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const QString& sName,
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const QString& tName,
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const QString& pName,
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const QString& namePrefix,
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const QString& descr,
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const QString& arch,
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const QString& _address_start_area,
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const QString& _address_stop_area,
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const flash_firmware_area_t& _firmware_area,
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const flash_type_t& _type,
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const reg_moder_byteaddress_t& _byteaddress,
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const reg_moder_qspiport_t& _spiPort,
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const QString& _ip,
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const unsigned int& _port,
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const QString & _tgtSection
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);
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const TgtMatch* lookup(const QString& fname);
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const TgtMatch* lookupArch(const QString& arc);
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TgtMatch* lookupCSCI(const QString& fname, const QString sAddr);
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const TgtMatch* lookupTgtSection(QString _tgtSection);
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const TgtMatch* lookupAppName(const QString& fname);
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};*/
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#endif // FPGAFLASHCONFIG_H
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